Patents by Inventor Brian Doyle

Brian Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11386951
    Abstract: A MTJ device includes a free (storage) magnet and fixed (reference) magnet between first and second electrodes, and a programmable booster between the free magnet and one of the electrodes. The booster has a magnetic material layer. The booster may further have an interface layer that supports the formation of a skyrmion spin texture, or a stable ferromagnetic domain, within the magnetic material layer. A programming current between two circuit nodes may be employed to set a position of the skyrmion or magnetic domain within the magnetic material layer to be more proximal to, or more distal from, the free magnet. The position of the skyrmion or magnetic domain to the MTJ may modulate TMR ratio of the MTJ device. The TMR ratio modulation may be employed to discern more than two states of the MTJ device. Such a multi-level device may, for example, be employed to store 2 bits/cell.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Kevin O'Brien, Brian Doyle, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy
  • Patent number: 11362140
    Abstract: Integrated circuits including 3D memory structures are disclosed. Air-gaps are purposefully introduced between word lines. The word lines may be horizontal or vertical.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 14, 2022
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma, Elijah V. Karpov
  • Publication number: 20220130820
    Abstract: A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises the first material, wherein the second structure is between the first and third structures.
    Type: Application
    Filed: January 10, 2022
    Publication date: April 28, 2022
    Applicant: Intel Corporation
    Inventors: Prashant Majhi, Ilya Karpov, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma
  • Publication number: 20220128391
    Abstract: A mobile fuel monitoring system (MMU) is disclosed. The fuel monitoring system may be skid mounted and is configured to monitor fuel transfers between a fuel source and a vessel, such as a ship. The disclosed MMU is a stand-alone, self-contained unit that can be easily moved from place to place. The MMU is configured to monitor and remotely report custody transfers of fuel performed at any location. Parameters of the fuel transfer operation, such as the amount of fuel transferred, the flow rate, the fuel density, and fuel temperature can be monitored and alarms may be issued if any of the parameters are out of specification. The parameter values may be transmitted to a remote location, for example, via a satellite link.
    Type: Application
    Filed: January 7, 2022
    Publication date: April 28, 2022
    Inventors: Anthony George, Thomas Smith, Brian Doyle, Emerson Ornstein
  • Patent number: 11248943
    Abstract: A mobile fuel monitoring system (MMU) is disclosed. The fuel monitoring system may be skid mounted and is configured to monitor fuel transfers between a fuel source and a vessel, such as a ship. The disclosed MMU is a stand-alone, self-contained unit that can be easily moved from place to place. The MMU is configured to monitor and remotely report custody transfers of fuel performed at any location. Parameters of the fuel transfer operation, such as the amount of fuel transferred, the flow rate, the fuel density, and fuel temperature can be monitored and alarms may be issued if any of the parameters are out of specification. The parameter values may be transmitted to a remote location, for example, via a satellite link.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: February 15, 2022
    Assignee: Nautical Control Solutions, LP
    Inventors: Anthony George, Thomas Smith, Brian Doyle, Emerson Ornstein
  • Patent number: 11222885
    Abstract: A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises of the first material, wherein the second structure is between the first and third structures. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: January 11, 2022
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Ilya Karpov, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma
  • Patent number: 11211489
    Abstract: Low resistance field-effect transistors and methods of manufacturing the same are disclosed herein. An example field-effect transistor disclosed herein includes a substrate and a stack above the substrate. The stack includes an insulator and a gate electrode. The example field-effect transistor includes a semiconductor material layer in a cavity in the stack. In the example field-effect transistor, a region of the semiconductor material layer proximate to the insulator is doped with a material of the insulator.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: December 28, 2021
    Assignee: Intel Corporation
    Inventors: Brian Doyle, Abhishek Sharma, Elijah Karpov, Ravi Pillarisetty, Prashant Majhi
  • Patent number: 11139401
    Abstract: Transistor structures with a deposited channel semiconductor material may have a vertical structure that includes a gate dielectric material that is localized to a sidewall of a gate electrode material layer. With localized gate dielectric material threshold voltage variation across a plurality of vertical transistor structures, such as a NAND flash memory string, may be reduced. A via may be formed through a material stack, exposing a sidewall of the gate electrode material layer and sidewalls of the dielectric material layers. A sidewall of the gate electrode material layer may be recessed selectively from the sidewalls of the dielectric material layers. A gate dielectric material, such as a ferroelectric material, may be selectively deposited upon the recessed gate electrode material layer, for example at least partially backfilling the recess. A semiconductor material may be deposited on sidewalls of the dielectric material layers and on the localized gate dielectric material.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: October 5, 2021
    Assignee: Intel Corporation
    Inventors: Brian Doyle, Rami Hourani, Elijah Karpov, Prashant Majhi, Ravi Pillarisetty, Abhishek Sharma
  • Patent number: 10964886
    Abstract: The present disclosure relates to the fabrication of spin transfer torque memory devices, wherein a magnetic tunnel junction of the spin transfer torque memory device is formed with Heusler alloys as the fixed and free magnetic layers and a tunnel barrier layer disposed between and abutting the fixed Heusler magnetic layer and the free Heusler magnetic layer, wherein the tunnel barrier layer is lattice matched to the free Heusler magnetic layer. In one embodiment, the tunnel barrier layer may be a strontium titanate layer.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Brian Doyle, Kaan Oguz, Satyarth Suri, Kevin O'Brien, Mark Doczy, Charles Kuo
  • Publication number: 20210063218
    Abstract: A mobile fuel monitoring system (MMU) is disclosed. The fuel monitoring system may be skid mounted and is configured to monitor fuel transfers between a fuel source and a vessel, such as a ship. The disclosed MMU is a stand-alone, self-contained unit that can be easily moved from place to place. The MMU is configured to monitor and remotely report custody transfers of fuel performed at any location. Parameters of the fuel transfer operation, such as the amount of fuel transferred, the flow rate, the fuel density, and fuel temperature can be monitored and alarms may be issued if any of the parameters are out of specification. The parameter values may be transmitted to a remote location, for example, via a satellite link.
    Type: Application
    Filed: August 26, 2020
    Publication date: March 4, 2021
    Inventors: Anthony George, Thomas Smith, Brian Doyle, Emerson Ornstein
  • Publication number: 20210023642
    Abstract: A welding-type system includes a power supply configured to control preheating of an electrode wire. A controller is configured to receive a plurality of power values corresponding to a power output of the power supply and calculate an arc power value corresponding to an arc condition at the preheated electrode wire based on a rate of change of the plurality of power values. A target power output value is determined based on the calculated arc power value, and the power output is adjusted based on the determined target power value.
    Type: Application
    Filed: October 13, 2020
    Publication date: January 28, 2021
    Inventors: Brian Doyle, Shuang Liu, Erik Miller, Adam E. Anders
  • Publication number: 20200388711
    Abstract: Transistor structures with a deposited channel semiconductor material may have a vertical structure that includes a gate dielectric material that is localized to a sidewall of a gate electrode material layer. With localized gate dielectric material threshold voltage variation across a plurality of vertical transistor structures, such as a NAND flash memtory string, may be reduced. A via may be formed through a material stack, exposing a sidewall of the gate electrode material layer and sidewalls of the dielectric material layers. A sidewall of the gate electrode material layer may be recessed selectively from the sidewalls of the dielectric material layers. A gate dielectric material, such as a ferroelectric material, may be selectively deposited upon the recessed gate electrode material layer, for example at least partially backfilling the recess. A semiconductor material may be deposited on sidewalls of the dielectric material layers and on the localized gate dielectric material.
    Type: Application
    Filed: June 7, 2019
    Publication date: December 10, 2020
    Inventors: Brian Doyle, Rami Hourani, Elijah Karpov, Prashant Majhi, Ravi Pillarisetty, Abhishek Sharma
  • Patent number: 10799973
    Abstract: A welding-type system includes a power supply configured to control preheating of an electrode wire. A controller is configured to receive a plurality of power values corresponding to a power output of the power supply and calculate an arc power value corresponding to an arc condition at the preheated electrode wire based on a rate of change of the plurality of power values. A target power output value is determined based on the calculated arc power value, and the power output is adjusted based on the determined target power value.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 13, 2020
    Assignee: Illinois Tool Works Inc.
    Inventors: Brian Doyle, Shuang Liu, Erik Miller, Adam E. Anders
  • Publication number: 20200312839
    Abstract: IC device including back-end-of-line (BEOL) transistors with crystalline channel material. A BEOL crystalline seed may be formed over a dielectric layer that has been planarized over a front-end-of-line (FEOL) transistor level that employs a monocrystalline substrate semiconductor. The BEOL crystalline seed may be epitaxial to the substrate semiconductor, or may have crystallinity independent of that of the substrate semiconductor. The BEOL crystalline seed may comprise a first material having a higher melt temperature than a melt material formed over the seed and over the dielectric layer. Through rapid melt growth, the melt material may be heated to a temperature sufficient to transition from an as-deposited state to a more crystalline state that is derived from, and therefore associated with, the BEOL crystalline seed. A BEOL transistor may then be fabricated from the crystallized material.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Prashant Majhi, Abhishek Sharma, Brian Doyle, Ravi Pillarisetty, Willy Rachmady
  • Publication number: 20200295379
    Abstract: A solid oxide fuel cell capable of directly utilizing hydrocarbons as a fuel source at operating temperatures between 200° C. and 500° C. The anode, electrolyte, and cathode of the solid oxide fuel cell can include technologies for improved operation at temperatures between 200° C. and 500° C. The anode can include technologies for improved direct utilization of hydrocarbon fuel sources.
    Type: Application
    Filed: July 19, 2017
    Publication date: September 17, 2020
    Inventors: Meilin Liu, Ik Chang, Yu Chen, Ben Deglee, Brian Doyle, Franklin Tao, Lei Zhang
  • Publication number: 20200235244
    Abstract: Low resistance field-effect transistors and methods of manufacturing the same are disclosed herein. An example field-effect transistor disclosed herein includes a substrate and a stack above the substrate. The stack includes an insulator and a gate electrode. The example field-effect transistor includes a semiconductor material layer in a cavity in the stack. In the example field-effect transistor, a region of the semiconductor material layer proximate to the insulator is doped with a material of the insulator.
    Type: Application
    Filed: December 27, 2017
    Publication date: July 23, 2020
    Applicant: Intel Corporation
    Inventors: Brian Doyle, Abhishek Sharma, Elijah Karpov, Ravi Pillarisetty, Prashant Majhi
  • Publication number: 20200005861
    Abstract: A MTJ device includes a free (storage) magnet and fixed (reference) magnet between first and second electrodes, and a programmable booster between the free magnet and one of the electrodes. The booster comprises a magnetic material layer. The booster may further comprise an interface layer that supports the formation of a skyrmion spin texture, or a stable ferromagnetic domain, within the magnetic material layer. A programming current between two circuit nodes may be employed to set a position of the skyrmion or magnetic domain within the magnetic material layer to be more proximal to, or more distal from, the free magnet. The position of the skyrmion or magnetic domain to the MTJ may modulate TMR ratio of the MTJ device. The TMR ratio modulation may be employed to discern more than two states of the MTJ device. Such a multi-level device may, for example, be employed to store 2 bits/cell.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: Kevin O'Brien, Brian Doyle, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy
  • Publication number: 20200006433
    Abstract: Integrated circuits including 3D memory structures are disclosed. Air-gaps are purposefully introduced between word lines. The word lines may be horizontal or vertical.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Prashant Majhi, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma, Elijah V. Karpov
  • Publication number: 20190304963
    Abstract: A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises of the first material, wherein the second structure is between the first and third structures. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Applicant: Intel Corporation
    Inventors: Prashant Majhi, Ilya Karpov, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma
  • Patent number: 10347830
    Abstract: Some embodiments include apparatuses and methods having a memory element included in a non-volatile memory cell, a transistor, an access line coupled to a gate to the transistor, a first conductive line, and a second conductive line. The memory element can include a conductive oxide material located over a substrate and between the first and second conductive lines. The memory element includes a portion coupled to a drain of the transistor and another portion coupled to the second conductive line. The first conductive line is coupled to a source of the transistor and can be located between the access line and the memory element. The access line has a length extending in a first direction and can be located between the substrate and the memory element. The first and second conductive lines have lengths extending in a second direction.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Sasikanth Manipatruni, Elijah Ilya Karpov, Brian Doyle, Dmitri E. Nikonov, Ian Young