Patents by Inventor Brian Doyle

Brian Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160242279
    Abstract: A system comprises an article comprising one or more fabric layers, a plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Application
    Filed: February 1, 2016
    Publication date: August 18, 2016
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Publication number: 20160141031
    Abstract: Some embodiments include apparatuses and methods having a memory element included in a non-volatile memory cell, a transistor, an access line coupled to a gate to the transistor, a first conductive line, and a second conductive line. The memory element can include a conductive oxide material located over a substrate and between the first and second conductive lines. The memory element includes a portion coupled to a drain of the transistor and another portion coupled to the second conductive line. The first conductive line is coupled to a source of the transistor and can be located between the access line and the memory element. The access line has a length extending in a first direction and can be located between the substrate and the memory element. The first and second conductive lines have lengths extending in a second direction.
    Type: Application
    Filed: November 18, 2014
    Publication date: May 19, 2016
    Inventors: Sasikanth Manipatruni, Elijah Ilya Karpov, Brian Doyle, Dmitri E. Nikonov, Ian Young
  • Patent number: 9327155
    Abstract: Exemplary embodiments of an exercise apparatus and its method of use are provided. An exercise apparatus can be provided having a resilient ball configured to support a weight of a user performing exercises thereon, and a shell member configured to cover at least an upper portion of the resilient ball. The shell member can have an inner surface conforming to an outer surface of the resilient ball. A toroidal member can be provided that can be attached to the shell member and can surround a portion of the resilient ball.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: May 3, 2016
    Inventor: Brian Doyle
  • Patent number: 9253884
    Abstract: A system comprises an article comprising one or more fabric layers, a plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 2, 2016
    Assignee: Intel Corporation
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Patent number: 9224794
    Abstract: A method of patterning a metal (141, 341, 841) on a vertical sidewall (132, 332, 832) of an excavated feature (130, 330, 830) includes placing a material (350) in the excavated feature such that a portion (435) of the metal is exposed in the excavated feature above the material, etching the exposed portion of the metal away from the vertical sidewall using a first wet etch chemistry, and removing the material from the excavated feature by etching it away using a second wet etch chemistry. The described method may be used to produce a MIM capacitor (800) suitable for an eDRAM device.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: December 29, 2015
    Assignee: Intel Corporation
    Inventors: Steven Keating, Nick Lindert, Nadia Rahhal-Orabi, Brian Doyle, Satyarth Suri, Swaminathan Sivakumar, Lana Jong, Lin Sha
  • Publication number: 20150332147
    Abstract: Automated techniques are provided for determining root causes of web site performance or availability problems. Performance metrics falling within a data analysis window are evaluated by a performance monitoring tool, where the performance metrics pertain to the loading of a web page. From the data analysis, particular problems may be surfaced for further consideration. Root causes are also determined for the surfaced problems and published by the performance monitoring tool.
    Type: Application
    Filed: May 19, 2014
    Publication date: November 19, 2015
    Applicant: Compuware Corporation
    Inventors: Paul Anastas, Brian Doyle, Paul Wilson, Boris Zibitsker, Alexander Lupersolsky
  • Publication number: 20150206564
    Abstract: Methods and systems to read a logic value stored in a magnetic tunnel junction (MTJ)-based memory cell based on a pulsed read current, with time between pulses to permit the MTJ to relax towards the magnetization orientation between the pulses, which may reduce build-up of momentum within the MTJ, and which may reduce and/or eliminate inadvertent re-alignment of a magnetization orientation. A sequence of symmetric and/or non-symmetric pulses may be applied to a wordline (WL) to cause a pre-charged bit line (BL) capacitance to discharge a pulsed read current through the MTJ, resulting in a corresponding sequence of voltage changes on the BL. The BL voltage changes may be integrated over the sequence of read current pulses, and a stored logic value may be determined based on the integrated voltage changes. The pre-charged BL capacitance may also serve as the voltage integrator.
    Type: Application
    Filed: March 25, 2012
    Publication date: July 23, 2015
    Inventors: Arijit Raychowdhury, David Kencke, Brian Doyle, Charles Kuo, James Tschanz, Fatih Hamzaoglu, Yih Wang, Roksana Golizadeh Mojarad
  • Publication number: 20150194596
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Application
    Filed: March 16, 2015
    Publication date: July 9, 2015
    Inventors: Kaan OGUZ, Mark L. DOCZY, Brian DOYLE, Uday SHAH, David L. KENCKE, Roksana GOLIZADEH MOJARAD, Robert S. CHAU
  • Publication number: 20150181692
    Abstract: A system comprises an article comprising one or more fabric layers, a plurality of electronic devices, each being incorporated into or onto one of the one or more fabric layers, and one or more communication links between two or more of the plurality of electronic devices. Each of the plurality of electronic devices can comprise a flexible substrate coupled to the fabric layer, one or more metallization layers deposited on the flexible substrate, and one or more electronic components electrically coupled to the one or more metallization layers.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Inventors: Christopher Jezewski, Ravi Pillarisetty, Brian Doyle
  • Patent number: 9036941
    Abstract: Among other disclosed subject matter, a computer-implemented method includes receiving illustrated content. The illustrated content includes half-tone content. The method includes blurring at least part of the illustrated content. The blurring is performed according to a blur radius. The method includes downscaling the blurred illustrated content to an output size.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: May 19, 2015
    Assignee: Hachette Book Group, Inc.
    Inventors: Brian Doyle, Ralph Munsen, Eric Cole, James Bean
  • Patent number: 9035387
    Abstract: Embodiments of an apparatus and methods for improving multi-gate device performance are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Brian Doyle, Titash Rakshit, Jack Kavalieros
  • Publication number: 20150096185
    Abstract: The invention pertains to the field of construction of buildings and structures. The invention relates to alignment guides for constructing building components, namely walls, ceilings and floors to be used in buildings and structures. This invention also relates to kits of specific alignment guides and methods of using alignment guides.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Inventor: Brian Doyle
  • Patent number: 8980650
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Kaan Oguz, Mark L. Doczy, Brian Doyle, Uday Shah, David L. Kencke, Roksana Golizadeh Mojarad, Robert S. Chau
  • Publication number: 20140349415
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Kaan Oguz, Mark L. Doczy, Brian Doyle, Uday Shah, David L. Kencke, Roksana Golizadeh Mojarad, Robert S. Chau
  • Publication number: 20140291663
    Abstract: An embodiment includes a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers; the tunnel barrier directly contacting a first side of the free layer; and an oxide layer directly contacting a second side of the free layer; wherein the tunnel barrier includes an oxide and has a first resistance-area (RA) product and the oxide layer has a second RA product that is lower than the first RA product. The MTJ may be included in a perpendicular spin torque transfer memory. The tunnel barrier and oxide layer form a memory having high stability with an RA product not substantively higher than a less table memory having a MTJ with only a single oxide layer. Other embodiments are described herein.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 2, 2014
    Inventors: Charles Kuo, Kaan Oguz, Brian Doyle, Elijah Ilya Karpov, Roksana Golizadeh Mojarad, David Kencke, Robert Chau
  • Patent number: 8836056
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: September 16, 2014
    Assignee: Intel Corporation
    Inventors: Kaan Oguz, Mark L. Doczy, Brian Doyle, Uday Shah, David L. Kencke, Roksana Golizadeh Mojarad, Robert S. Chau
  • Publication number: 20140152701
    Abstract: Among other disclosed subject matter, a computer-implemented method includes receiving illustrated content. The illustrated content includes half-tone content. The method includes blurring at least part of the illustrated content. The blurring is performed according to a blur radius. The method includes downscaling the blurred illustrated content to an output size.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 5, 2014
    Applicant: Hachette Book Group, Inc.
    Inventors: Brian Doyle, Ralph Munsen, Eric Cole, James Bean
  • Publication number: 20140097495
    Abstract: Embodiments of an apparatus and methods for improving multi-gate device performance are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: November 25, 2013
    Publication date: April 10, 2014
    Inventors: Ravi Pillarisetty, Brian Doyle, Titash Rakshit, Jack Kavalieros
  • Publication number: 20140095598
    Abstract: A method for evaluating an online entity presence includes receiving a set of social media information for at least one entity and calculating a social media measurement where the social media measurement is associated with the set of social media information. The method further includes receiving a set of online profile information for the at least one entity, the set of online profile information being associated with one or more non-social media online profiles, and calculating an online profile measurement wherein the online profile measurement is associated with the set of online profile information. The method further includes calculating a reach value, the reach value being associated with the social media measurement and the online profile measurement and providing a reach score to a user where the reach score associated with the reach value.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: WEST SERVICES INC.
    Inventors: JILL SCHORNACK, Eric Iverson, Brian Doyle, Aaron Hareid
  • Publication number: 20140084398
    Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.
    Type: Application
    Filed: September 26, 2012
    Publication date: March 27, 2014
    Inventors: Kaan OGUZ, Mark L. DOCZY, Brian DOYLE, Uday SHAH, David L. KENCKE, Roksana GOLIZADEH MOJARAD, Robert S. CHAU