Patents by Inventor Brian Vaartstra

Brian Vaartstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7858815
    Abstract: A method of forming (and apparatus for forming) a tantalum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and a tantalum precursor compound that includes alkoxide ligands, for example.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: December 28, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7790632
    Abstract: This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprising layer includes positioning a substrate within a deposition chamber. First and second vapor phase reactants are introduced in alternate and temporally separated pulses to the substrate within the chamber in a plurality of deposition cycles under conditions effective to deposit a phosphorus doped silicon dioxide comprising layer on the substrate. One of the first and second vapor phase reactants is PO(OR)3 where R is hydrocarbyl, and an other of the first and second vapor phase reactants is Si(OR)3OH where R is hydrocarbyl.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: September 7, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20100199486
    Abstract: A preferred embodiment of the invention is directed to support structures such as spacers used to provide a uniform distance between two layers of a device. In accordance with a preferred embodiment, the spacers may be formed utilizing flow-fill deposition of a wet film in the form of a precursor such as silicon dioxide. Formation of spacers in this manner provides a homogenous amorphous support structure that may be used to provide necessary spacing between layers of a device such as a flat panel display.
    Type: Application
    Filed: April 21, 2010
    Publication date: August 12, 2010
    Applicant: MOSAID Technologies Incorporated
    Inventor: Brian A. Vaartstra
  • Publication number: 20100171089
    Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.
    Type: Application
    Filed: March 17, 2010
    Publication date: July 8, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian A. VAARTSTRA
  • Publication number: 20100147218
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Application
    Filed: February 26, 2010
    Publication date: June 17, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian A. VAARTSTRA, Timothy A. Quick
  • Patent number: 7723907
    Abstract: A preferred embodiment of the invention is directed to support structures such as spacers used to provide a uniform distance between two layers of a device. In accordance with a preferred embodiment, the spacers may be formed utilizing flow-fill deposition of a wet film in the form of a precursor such as silicon dioxide. Formation of spacers in this manner provides a homogenous amorphous support structure that may be used to provide necessary spacing between layers of a device such as a flat panel display.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: May 25, 2010
    Assignee: MOSAID Technologies Incorporated
    Inventor: Brian A. Vaartstra
  • Publication number: 20100099272
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 22, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian A. Vaartstra
  • Patent number: 7683001
    Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: March 23, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7678708
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: March 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7666801
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: February 23, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7648926
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: January 19, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20090278232
    Abstract: A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The diffusion barrier layer is formed of RuSix, where x is in the range of about 0.01 to about 10. The barrier layer may be formed by depositing RuSix by chemical vapor deposition or the barrier layer may be formed by forming a layer of ruthenium relative to a silicon containing region and performing an anneal to form RuSix from the layer of ruthenium and the silicon containing region. Capacitor electrodes, interconnects or other structures may be formed with such a diffusion barrier layer.
    Type: Application
    Filed: July 13, 2009
    Publication date: November 12, 2009
    Applicant: MICRON TECHNOLOGY, INC
    Inventors: Brian A. Vaartstra, Eugene P. Marsh
  • Patent number: 7576378
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: August 18, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7560815
    Abstract: A device structure including a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The diffusion barrier layer is formed of RuSix, where x is in the range of about 0.01 to about 10. Capacitor electrodes, interconnects or other structures may be formed with such a diffusion barrier layer.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 14, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Eugene P. Marsh
  • Patent number: 7560393
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: July 14, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20090149033
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Application
    Filed: January 13, 2009
    Publication date: June 11, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7544615
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum nitride barrier layer, on a substrate by using an atomic layer deposition process (a vapor deposition process that includes a plurality of deposition cycles) with a refractory metal precursor compound, an organic amine, and an optional silicon precursor compound.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: June 9, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20090109731
    Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.
    Type: Application
    Filed: December 29, 2008
    Publication date: April 30, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian A. Vaartstra
  • Patent number: 7524410
    Abstract: A method and apparatus for removing conductive material from a microelectronic substrate is disclosed. One method includes disposing an electrolytic liquid between a conductive material of a substrate and at least one electrode, with the electrolytic liquid having about 80% water or less. The substrate can be contacted with a polishing pad material, and the conductive material can be electrically coupled to a source of varying electrical signals via the electrolytic liquid and the electrode. The method can further include applying a varying electrical signal to the conductive material, moving at least one of the polishing pad material and the substrate relative to the other, and removing at least a portion of the conductive material while the electrolytic liquid is adjacent to the conductive material. By limiting/controlling the amount of water in the electrolytic liquid, an embodiment of the method can remove the conductive material with a reduced downforce.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: April 28, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Whonchee Lee, Scott E. Moore, Brian A. Vaartstra
  • Publication number: 20090042406
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Application
    Filed: October 9, 2008
    Publication date: February 12, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian A. Vaartstra, Timothy A. Quick