Patents by Inventor Brian Vaartstra

Brian Vaartstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7253122
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 7, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7250367
    Abstract: An ALD method includes exposing a substrate to a first precursor including a plurality of different ligands, chemisorbing a precursor monolayer on the substrate, and reacting a second precursor with the precursor monolayer to yield a product monolayer. A surface reactive ligand exhibits a chemisorption affinity that exceeds the chemisorption affinity exhibited by a gas reactive ligand. Another deposition method includes exposing a substrate to a precursor containing an amino and/or imino ligand and a halide ligand and depositing a layer. The precursor exhibits a volatility that exceeds the volatility with a halide ligand taking the place of each amino and/or imino ligand. The precursor exhibits a thermal stability that exceeds the thermal stability with an amino and/or imino ligand taking the place of each halide ligand. The layer may exhibit less halogen content than with a halide ligand taking the place of each amino and/or imino ligand.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: July 31, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Donald Westmoreland, Eugene P. Marsh, Stefan Uhlenbrock
  • Publication number: 20070166999
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Application
    Filed: February 28, 2007
    Publication date: July 19, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20070161260
    Abstract: This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprising layer includes positioning a substrate within a deposition chamber. First and second vapor phase reactants are introduced in alternate and temporally separated pulses to the substrate within the chamber in a plurality of deposition cycles under conditions effective to deposit a phosphorus doped silicon dioxide comprising layer on the substrate. One of the first and second vapor phase reactants is PO(OR)3 where R is hydrocarbyl, and an other of the first and second vapor phase reactants is Si(OR)30H where R is hydrocarbyl.
    Type: Application
    Filed: November 21, 2006
    Publication date: July 12, 2007
    Inventor: Brian Vaartstra
  • Publication number: 20070155190
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Application
    Filed: February 28, 2007
    Publication date: July 5, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Vaartstra, Timothy Quick
  • Publication number: 20070144438
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Application
    Filed: February 28, 2007
    Publication date: June 28, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20070138930
    Abstract: A preferred embodiment of the invention is directed to support structures such as spacers used to provide a uniform distance between two layers of a device. In accordance with a preferred embodiment, the spacers may be formed utilizing flow-fill deposition of a wet film in the form of a precursor such as silicon dioxide. Formation of spacers in this manner provides a homogenous amorphous support structure that may be used to provide necessary spacing between layers of a device such as a flat panel display.
    Type: Application
    Filed: August 21, 2006
    Publication date: June 21, 2007
    Inventor: Brian Vaartstra
  • Patent number: 7196007
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: March 27, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20070045856
    Abstract: Mixed metal aluminum nitride and boride diffusion barriers and electrodes for integrated circuits, particularly for DRAM cell capacitors. Also provided are methods for CVD deposition of MxAlyNzBw alloy diffusion barriers, wherein M is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, or W; x is greater than zero; y is greater than or equal to zero; the sum of z and w is greater than zero; and wherein when y is zero, z and w are both greater than zero.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 1, 2007
    Inventors: Brian Vaartstra, Donald Westmoreland
  • Publication number: 20070006798
    Abstract: A method of forming (and system for forming) layers, such as calcium, barium, strontium, and/or magnesium, tantalates and/or niobates, and optionally titanates, on a substrate by employing a vapor deposition method, particularly a multi-cycle atomic layer deposition process.
    Type: Application
    Filed: September 14, 2006
    Publication date: January 11, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Vaartstra, Stefan Uhlenbrock
  • Publication number: 20060292788
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Application
    Filed: August 31, 2006
    Publication date: December 28, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20060261389
    Abstract: A method of forming (and apparatus for forming) a zirconium and/or hafnium-containing layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more silicon precursor compounds of the formula Si(OR)4 with one or more zirconium and/or hafnium precursor compounds of the formula M(NR?R?)4, wherein R, R?, and R? are each independently an organic group and M is zirconium or hafnium.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 23, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20060258175
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Application
    Filed: July 17, 2006
    Publication date: November 16, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Vaartstra, Timothy Quick
  • Publication number: 20060252279
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.
    Type: Application
    Filed: July 13, 2006
    Publication date: November 9, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Brian Vaartstra
  • Publication number: 20060252244
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Application
    Filed: July 12, 2006
    Publication date: November 9, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian Vaartstra, Timothy Quick
  • Patent number: 7125815
    Abstract: This invention includes methods of forming phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of forming a phosphorus doped silicon dioxide comprising layer includes positioning a substrate within a deposition chamber. First and second vapor phase reactants are introduced in alternate and temporally separated pulses to the substrate within the chamber in a plurality of deposition cycles under conditions effective to deposit a phosphorus doped silicon dioxide comprising layer on the substrate. One of the first and second vapor phase reactants is PO(OR)3 where R is hydrocarbyl, and an other of the first and second vapor phase reactants is Si(OR)3OH where R is hydrocarbyl.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: October 24, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20060231017
    Abstract: The invention includes atomic layer deposition methods and chemical vapor deposition methods. In a particular aspect of the invention, a source of microwave radiation is provided proximate a reaction chamber. At least a fragment of a precursor material is chemisorbed on a substrate within the reaction chamber while not exposing the precursor material to microwave radiation from the source. Excess precursor material is removed from the chamber, and the chemisorbed material is subsequently exposed to microwave radiation from the source within the reaction chamber.
    Type: Application
    Filed: June 13, 2006
    Publication date: October 19, 2006
    Applicant: Micron Technology, Inc.
    Inventor: Brian Vaartstra
  • Patent number: 7122464
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: October 17, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7115528
    Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7115166
    Abstract: A method of forming (and apparatus for forming) a layer, such as a strontium titanate, barium titanate, or barium-strontium titanate layer, on a substrate by employing a vapor deposition method, particularly a multi-cycle atomic layer deposition process.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Stefan Uhlenbrock