Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g.

Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g.

Abstract: A preferred embodiment of this invention includes an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g.

Abstract: This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The method may comprise providing a substrate comprising a microelectronic circuit and a porous silica layer, the porous silica layer having an average pore diameter between 2 and 80 nm; and heating the substrate to one or more temperatures between 100 and 490 degrees C. in a substantially halogen-free atmosphere, whereby one or more dielectric properties of the porous dielectric are improved. In some embodiments, the atmosphere comprises a phenyl-containing atmosphere, such as hexaphenyldisilazane.

Abstract: This invention pertains generally to precursors and deposition methods suited to aerogel thin film fabrication. An aerogel precursor sol which contains an oligomerized metal alkoxide (such as TEOS), a high vapor pressure solvent (such as ethanol) and a low vapor pressure solvent (such as water and 1-butanol) is disclosed. By a method according to the present invention, such a precursor sol is applied as a thin film to a semiconductor wafer, and the high vapor pressure solvent is allowed to evaporate while evaporation of the low vapor pressure solvent is limited, preferably by controlling the atmosphere adjacent to the wafer. The reduced sol is then allowed to gel at a concentration determined by the ratio of metal.alkoxide to low vapor pressure solvent. One advantage of the present invention is that it provides a stable, spinnable sol for setting film thickness and providing good planarity and gap fill for patterned wafers.

Abstract: This invention has enabled a new, simple thin film nanoporous dielectric fabrication method. In general, this invention uses glycerol, or another low volatility compound, as a solvent. This new method allows thin film aerogels/low density xerogels to be made without supercritical drying, freeze drying, or a surface modification step before drying. Thus, this invention allows production of nanoporous dielectrics at room temperature and atmospheric pressure, without a separate surface modification step. Although this new method allows fabrication of aerogels without substantial pore collapse during drying, there may be some permanent shrinkage during aging and/or drying. This invention allows controlled porosity thin film nanoporous aerogels to be deposited, gelled, aged, and dried without atmospheric controls.

Abstract: A computer image display device includes a light transparent glass anode plate (10) spaced from a cathode substrate (12) which has a plurality of microtips (14). Plate (10) has an inside surface (25) which is contoured with an array of prisms (36) having equal sides (58, 59) that converge rearwardly toward apexes (38) of peaks (36). Apexes (38) are covered with light absorbing material (47), then covered at anode comb forming regions (51, 52, 53) with conductive material (48). Different color luminescing phosphors (24a, 24b, 24c) are applied over the respective anode combs (51, 52, 53). Sides (58, 59) direct ambient light toward apexes (38) for absorption by material (47). Light emitted by phosphors (24a, 24b, 24c) is directed by valleys (60) toward outside surface (35) of plate (10).

Abstract: A grooved anode plate 40 for use in a field emission flat panel display device comprises a transparent planar substrate 42 having a plurality of electrically conductive, parallel stripes 46 comprising the anode electrode of the device, which are covered by phosphors 48.sub.R, 48.sub.G and 48.sub.B. In one embodiment, grooves 50, having generally straight sidewalls, are formed in the upper surface of planar substrate 42 at the interstices of conductors 46. In a second embodiment, grooves 50', which provide a substantial undercutting of the material of substrate 42' adjacent the edges of conductors 46', are formed in the upper surface of planar substrate 42' at the interstices of conductors 46'. A substantially opaque, electrically insulating material 52 is affixed to substrate 42 in the grooves 50 formed between conductors 46, acting as a barrier to the passage of ambient light into and out of the device.

Abstract: The capacitance type gaseous sensing device (10) includes a first electrode layer (12) formed on a semiconductor substrate layer (14). A seed layer (16) is formed on the first electrode layer (12). A reorganized layer (18) is formed on the first electrode layer (12) through interaction with the seed layer (16) to form a porous sensing layer. A second electrode layer (20) is formed on the reorganized layer (18). The reorganized layer (18) absorbs gaseous elements that change the dielectric constant of the capacitance type sensor device (10). A change in the dielectric constant causes a change in the capacitance of the reorganized layer (18) as measured across the first electrode layer (12) and the second electrode layer (20).

Abstract: This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The method may comprise providing a substrate comprising a microelectronic circuit and a porous silica layer, the porous silica layer having an average pore diameter between 2 and 80 nm; and heating the substrate to one or more temperatures between 100 and 490 degrees C. in a substantially halogen-free atmosphere, whereby one or more dielectric properties of the porous dielectric are improved. In some embodiments, the atmosphere comprises a phenyl-containing atmosphere, such as hexaphenyldisilazane.

Abstract: The capacitance type gaseous sensing device (10) includes a first electrode layer (12) formed on a semiconductor substrate layer (14). A seed layer (16) is formed on the first electrode layer (12). A reorganized layer (18) is formed on the first electrode layer (12) through interaction with the seed layer (16) to form a porous sensing layer. A second electrode layer (20) is formed on the reorganized layer (18). The reorganized layer (18) absorbs gaseous elements that change the dielectric constant of the capacitance type sensor device (10). A change in the dielectric constant causes a change in the capacitance of the reorganized layer (18) as measured across the first electrode layer (12) and the second electrode layer (20).

Abstract: This invention provides a process for making a semiconductor device with reduced capacitance between adjacent conductors. This process can include applying a solution between conductors 24, and then gelling, surface modifying, and drying the solution to form an extremely porous dielectric layer 28. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.

Abstract: This invention provides a semiconductor device with reduced capacitance between adjacent conductors. A porous dielectric layer 28 is formed on conductors 24. A non-porous dielectric layer 30 is formed on porous layer 28, and a second porous dielectric layer 36 is formed on non-porous layer 30. The porous dielectric layers comprise open-pored networks, preferably formed by an atmospheric pressure aerogel process. The present invention allows the construction of semiconductor devices employing multiple layers of conductors with porous low dielectric constant insulation.

Abstract: An emitter structure 12 for use in a field emission display device comprises a ballast layer 17 overlying an electrically conductive coating 16 (cathode electrode), which is itself formed on an electrically insulating substrate 18. A gate electrode comprises a coating of an electrically conductive material 22 which is deposited on an insulating layer 20. Cone-shaped microtips 14 formed within apertures 34 through conductive layer 22 and insulating layer 20. In the present invention, insulating layer 20 comprises a dielectric material capable of desorbing at least ten atomic percent hydrogen, which may illustratively comprise hydrogen silsesquioxane (HSQ). HSQ is an abundant source of hydrogen which keeps deleterious oxides from forming on microtip emitters 14. HSQ also reduces the capacitance formed by cathode electrode 16 and gate electrode 22, since its relative dielectric constant is less than 3.5.

Abstract: A method for forming air gaps 22 between metal leads 16 of a semiconductor device. A metal layer is deposited on a substrate 12. The metal layer is etched to form metal leads 16, exposing portions of the substrate 12. A disposable liquid 18 is deposited on the metal leads 16 and the exposed portions of substrate 12, and a top portion of the disposable liquid 18 is removed to lower the disposable liquid 18 to at least the tops of the leads 16. A porous silica precursor film 20 is deposited on the disposable liquid 18 and over the tops of the leads 16. The porous silica precursor film 20 is gelled to form a low-porosity silica film 24. The disposable liquid 18 is removed through the low-porosity silica film 24 to form air gaps 22 between metal leads 16 beneath the low-porosity silica film 24. The air gaps 22 have a low dielectric constant and result in reduced capacitance between the metal leads and decreased power consumption.

Abstract: This invention provides a semiconductor device and process for making the same with dramatically reduced capacitance between adjacent conductors and an interlayer dielectric construction which emphasizes mechanical strength, etch compatibility, and good heat transfer. This process can include applying a solution between conductors 24, and then gelling, surface modifying, and drying the solution to form an extremely porous dielectric layer 28. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric and provide mechanical strength, heat transfer, and a solid layer for via etch. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.

Abstract: A method disclosed herein for making a spacer 30 useful for maintaining a fixed spacing between the cathode 12 and anode 10 structures of a flat display. The method includes the steps of melting an end of a glass filament 40 held in the bore of a capillary 42, urging the melted end 46 against the surface 23 of the cathode structure 12 to form a bond thereon, and severing the filament 40 at a fixed distance h from the surface 23 to thereby form an upright spacer 30. The severing step may be accomplished by tilting or twisting the capillary 42 until the filament 40 is severed, or by cutting the filament 40 with a torch flame 54. The bonding process may be enhanced by preheating the cathode structure 12 and/or by subjecting the cathode structure 12 to ultrasonic vibration during bonding.

Abstract: This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.

Abstract: An anode plate (10) for use in a field emission flat panel display device (8) comprises a transparent substrate (26) having a plurality of spaced-apart, electrically conductive regions (28) which form the anode electrode of the display device (8). The conductive regions (28) are covered by a luminescent material (24). A getter material (29) is deposited on the substrate (26) and between the conductive regions (28) of the anode plate (10). The getter material (29) is preferably an electrically nonconductive, high porosity, and low density material, such as an aerogel or xerogel. Methods of fabricating the getter material (29) on the anode plate (10) are disclosed.

Abstract: An emitter structure 12 for use in a field emission display device comprises a ballast layer 17 overlying ah electrically conductive coating 16 (cathode electrode), which is itself formed on an electrically insulating substrate 18. A gate electrode comprises a coating of an electrically conductive material 22 which is deposited on an insulating layer 20. Cone-shaped microtips 14 formed within apertures 34 through conductive layer 22 and insulating layer 20. In the present invention, insulating layer 20 comprises a dielectric material capable of desorbing at least ten atomic percent hydrogen, which may illustratively comprise hydrogen silsesquioxane (HSQ). HSQ is an abundant source of hydrogen which keeps deleterious oxides from forming on microtip emitters 14. HSQ also reduces the capacitance formed by cathode electrode 16 and gate electrode 22, since its relative dielectric constant is less than 3.5.