Patents by Inventor Byung Joon AN

Byung Joon AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170270643
    Abstract: A method of removing noise from image data output from an image sensor includes comparing a target block in the image data with each of at least one comparison blocks around the target block in the image data. A center pixel similarity between center pixels of the target block and each comparison block is calculated. A neighboring pixel similarity between neighboring pixels neighboring the center pixels in the target block and each comparison block is calculated. The method includes determining whether an impulsive noise exists in the center pixel of the target block based on the center pixel similarity and the neighboring pixel similarity. A weight applied to a value of the center pixel of each comparison block is adjusted based on a result of the determining. Weighted averaging is performed on values of the center pixels of the comparison blocks to estimate a value of the center pixel of the target block.
    Type: Application
    Filed: February 17, 2017
    Publication date: September 21, 2017
    Inventor: BYUNG-JOON BAEK
  • Patent number: 9754897
    Abstract: A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: September 5, 2017
    Assignee: STATS ChipPAC, Pte. Ltd.
    Inventors: Yaojian Lin, Byung Joon Han, Rajendra D. Pendse, Il Kwon Shim, Pandi C. Marimuthu, Won Kyoung Choi, Linda Pei Ee Chua
  • Patent number: 9748288
    Abstract: Provided are an image sensor and an imaging apparatus. The image sensor of a multi-layered sensor structure, the image sensor includes a plurality of sensing pixels, each of the plurality of sensing pixels including a micro lens configured to collect light, a first photoelectric converter configured to convert light of a first wavelength band into an electric signal, and a second photoelectric converter formed on a substrate configured to convert incident light into the electric signal, wherein a central axis of the second photoelectric converter is spaced apart from an optical axis of the micro lens.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: August 29, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byung-joon Baek
  • Patent number: 9721862
    Abstract: A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: August 1, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, Yaojian Lin, Pandi C. Marimuthu
  • Patent number: 9716830
    Abstract: An image signal processing device includes a channel converter to divide an input signal stream, that includes image signals generated by a plurality of pixels, by processing units and generate a plurality of processing unit signals, an image signal processing core including a plurality of image processing channels each performing an image signal processing operation, and generating a plurality of output unit signals by receiving and processing the plurality of processing unit signals in parallel through one or more of the plurality of image processing channels, a channel combiner to combine the plurality of output unit signals and generate an output signal stream, and a configuration controller to control, according to an operation mode, at least one of the number of the plurality of processing unit signals, selection of a frequency of a processing clock signal, and combination of the plurality of output unit signals.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: July 25, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Byung-Joon Baek
  • Patent number: 9705745
    Abstract: A system and method for virtualizing SDN-based network monitoring. The system for includes: an information collector, a monitoring component, an information converter, and a resource allocator, in which a user-defined virtual monitor is included so that integrated monitoring may be performed, and expandability may be guaranteed to dynamically respond to a user's, demands.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: July 11, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae Sang Choi, Sang Sik Yoon, Sae Hoon Kang, Ji Young Kwak, Young Hwa Kim, Sae Hyong Park, Yong Yoon Shin, Ji Soo Shin, Sun Hee Yang, Byung Yun Lee, Byung Joon Lee
  • Patent number: 9704824
    Abstract: A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (?m) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 ?m or less.
    Type: Grant
    Filed: November 2, 2013
    Date of Patent: July 11, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Pandi C. Marimuthu, Il Kwon Shim, Byung Joon Han
  • Publication number: 20170175988
    Abstract: There is provided a lighting assembly comprising: a frame; a power supply connector coupled to the frame at and along a first inner side of the frame, wherein the power supply connector is configured to receive a power from an external power supply; a support coupled to the frame at and along a second inner side of the frame, wherein the first side is opposite to the second side; and a lighting module disposed between and coupled to the power supply connector and the support, wherein the lighting module is configured to receive the power from the power supply connector, and the lighting module has a lighting element embedded therein, wherein the lighting module is physically supported by the support.
    Type: Application
    Filed: June 24, 2016
    Publication date: June 22, 2017
    Inventor: Byung Joon JEON
  • Publication number: 20170136570
    Abstract: A bonding stage is provided. The bonding stage includes a first heater disposed under a first region of a substrate having a plurality of semiconductor chips disposed thereon, a second heater disposed under a second region different from the first region of the substrate, a cooler disposed under the first heater and the second heater and blocking heat of the first heater and heat of the second heater from being transferred to lower portions of the first heater and the second heater, and a thin plate disposed on the first heater and the second heater to support the substrate and transferring the heat of the first heater and the heat of the second heater to the substrate, wherein the first heater and the second heater are independently operated.
    Type: Application
    Filed: November 1, 2016
    Publication date: May 18, 2017
    Inventors: Seung Dae Seok, Sang Yoon Kim, Hui Jae KIM, Jae Bong SHIN, Byung Joon LEE
  • Publication number: 20170132748
    Abstract: A method of processing a graphics command may include: receiving the graphics command from an apparatus that executes an application; selecting at least one shader included in the graphics command to be processed by a graphics processor; creating a shader program using the selected at least one shader; searching for a shader program corresponding to the created shader program from among one or more previously compiled shader programs; and outputting a found shader program.
    Type: Application
    Filed: June 30, 2016
    Publication date: May 11, 2017
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-su KIM, Byung-joon CHANG, Bong-hoon PARK, Chan-min PARK, Woo-ram ANN, Tae-young LEE, Joo-young JUNG, Cheul-hee HAHM
  • Patent number: 9647219
    Abstract: Provided are nitrogen-doped carbon quantum dots as pyrolysis product of fumaronitrile. The carbon quantum dots may be formed in such a manner that nitrogen may be doped in an amount of 3-10 wt % based on the total weight of the carbon quantum dots with no need for a separate doping process. As a result, the carbon quantum dots have excellent properties, such as optical property, electroconductivity and thermal safety, and thus may be useful for photocatalysts or organic solar cells, or the like.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: May 9, 2017
    Assignee: Korea Institute of Science and Technology
    Inventors: Sukang Bae, Byung Joon Moon, Ye Lin Oh, Dongheon Shin, Sang Jin Kim, Sang Hyun Lee, Tae-Wook Kim, Dong Su Lee, Min Park
  • Publication number: 20170126996
    Abstract: A lens distortion correction device and an application processor having the same include a distortion correction unit configured to correct a distorted image into an undistorted image and an image enhancement unit configured to improve the undistorted image using a high-frequency component of the distorted image.
    Type: Application
    Filed: January 13, 2017
    Publication date: May 4, 2017
    Inventors: Byung-Joon Baek, Joon-Ki Paik, Tae-Chan Kim, Dong-Gyun Kim, Jin-Ho Park
  • Patent number: 9633419
    Abstract: A lens distortion correction device and an application processor having the same include a distortion correction unit configured to correct a distorted image into an undistorted image and an image enhancement unit configured to improve the undistorted image using a high-frequency component of the distorted image.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: April 25, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Joon Baek, Joon-Ki Paik, Tae-Chan Kim, Dong-Gyun Kim, Jin-Ho Park
  • Publication number: 20170110672
    Abstract: Provided are nitrogen-doped carbon quantum dots as pyrolysis product of fumaronitrile. The carbon quantum dots may be formed in such a manner that nitrogen may be doped in an amount of 3-10 wt % based on the total weight of the carbon quantum dots with no need for a separate doping process. As a result, the carbon quantum dots have excellent properties, such as optical property, electroconductivity and thermal safety, and thus may be useful for photocatalysts or organic solar cells, or the like.
    Type: Application
    Filed: October 19, 2016
    Publication date: April 20, 2017
    Applicant: Korea Institute of Science and Technology
    Inventors: Sukang BAE, Byung Joon MOON, Ye Lin OH, Dongheon SHIN, Sang Jin KIM, Sang Hyun LEE, Tae-Wook KIM, Dong Su LEE, Min PARK
  • Publication number: 20170110599
    Abstract: A semiconductor device has a first semiconductor die including an active region formed on a surface of the first semiconductor die. The active region of the first semiconductor die can include a sensor. An encapsulant is deposited over the first semiconductor die. A conductive layer is formed over the encapsulant and first semiconductor die. An insulating layer can be formed over the first semiconductor die. An opening is formed in the insulating layer over the active region. A transmissive layer is formed over the first semiconductor die including the active region. The transmissive layer includes an optical dielectric material or an optical transparent or translucent material. The active region is responsive to an external stimulus passing through the transmissive layer. A plurality of bumps is formed through the encapsulant and electrically connected to the conductive layer. A second semiconductor die is disposed adjacent to the first semiconductor die.
    Type: Application
    Filed: December 29, 2016
    Publication date: April 20, 2017
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, Heap Hoe Kuan
  • Publication number: 20170097828
    Abstract: Disclosed herein are an apparatus and method for booting a virtual machine. The apparatus for booting a virtual machine includes: an access unit for accessing a virtual disk, corresponding to a virtual machine that exists in a virtualization area, using a trap generated by a trap generation unit, and for controlling the input and output of data stored in the virtual disk; an extraction unit for extracting data used for booting from the virtual disk; and a verification unit for extracting a trusted boot image from image storage and verifying the integrity of the data used for booting based on a result of comparing the trusted boot image with the data used for booting.
    Type: Application
    Filed: March 14, 2016
    Publication date: April 6, 2017
    Inventors: Sung-Jin KIM, Woomin HWANG, Byung-Joon KIM, Chul-Woo LEE, Hyoung-Chun KIM
  • Publication number: 20170092529
    Abstract: A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.
    Type: Application
    Filed: December 14, 2016
    Publication date: March 30, 2017
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, Won Kyoung Choi
  • Patent number: 9581186
    Abstract: A rivet stud bolt is disclosed. A rivet stud bolt for mounting an element to at least one panel includes a bolt portion to which the panel is assembled, a flange integrally formed to an end of the bolt portion, and a rivet portion integrally connected to the flange, in which at least two slits are formed, and the rivet portion is plastically deformed and connected to the panel.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: February 28, 2017
    Assignee: SUNGWOO HITECH CO., LTD.
    Inventors: Byung Joon Park, Mun Yong Lee
  • Patent number: 9564413
    Abstract: A semiconductor device has a first semiconductor die including an active region formed on a surface of the first semiconductor die. The active region of the first semiconductor die can include a sensor. An encapsulant is deposited over the first semiconductor die. A conductive layer is formed over the encapsulant and first semiconductor die. An insulating layer can be formed over the first semiconductor die. An opening is formed in the insulating layer over the active region. A transmissive layer is formed over the first semiconductor die including the active region. The transmissive layer includes an optical dielectric material or an optical transparent or translucent material. The active region is responsive to an external stimulus passing through the transmissive layer. A plurality of bumps is formed through the encapsulant and electrically connected to the conductive layer. A second semiconductor die is disposed adjacent to the first semiconductor die.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: February 7, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Joon Han, Il Kwon Shim, Heap Hoe Kuan
  • Publication number: 20170032654
    Abstract: Embodiments of a power failure monitoring device of a digital protection relay capable of preventing a relay operation error and a data loss by determining a power failure when an electric power voltage being detected is dropped to be equal to or less than a prestored power failure reference voltage to enable a controller to perform a power failure preparation operation are provided.
    Type: Application
    Filed: July 20, 2016
    Publication date: February 2, 2017
    Inventor: Byung-Joon JEON