Patents by Inventor Byung-Jun Kim

Byung-Jun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11366733
    Abstract: A method for controlling temperature of a memory system which includes a memory device suitable for storing memory map data including a logical address of an external device and a physical address of a memory device, corresponding to the logical address; and a controller suitable for downloading at least a part of the memory map data and storing and managing the downloaded data as controller map data, and uploading at least a part of the controller map data to the external device, the method comprising: measuring temperature of the memory device; and performing a map downloading for the memory map data from the memory device in response to the measured temperature.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: June 21, 2022
    Assignee: SK hynix Inc.
    Inventor: Byung-Jun Kim
  • Patent number: 11327865
    Abstract: A method for controlling temperature of a memory system which includes a memory device suitable for storing memory map data including a logical address of an external device and a physical address of a memory device, corresponding to the logical address; and a controller suitable for downloading at least a part of the memory map data and storing and managing the downloaded data as controller map data, and uploading at least a part of the controller map data to the external device, the method comprising: measuring temperature of the memory device; and performing a map downloading for the memory map data from the memory device in response to the measured temperature.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: May 10, 2022
    Assignee: SK hynix Inc.
    Inventor: Byung-Jun Kim
  • Patent number: 11302385
    Abstract: An electronic device includes a memory controller and a memory device. The memory controller that controls the memory device includes a write buffer to temporarily store write data received from a host, a write timing controller to receive temperature information indicating a temperature of the memory device and generate write timing information based on the temperature information, the write timing information indicating a write timing at which the write data is transferred to and stored in the memory device, and a write operation controller to control the write buffer and the memory device based on the write timing information such that the write data stored in the write buffer is transferred to and stored in the memory device.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: April 12, 2022
    Inventor: Byung Jun Kim
  • Patent number: 11275682
    Abstract: A memory system includes a memory device comprising a memory block having a plurality of pages; and a controller suitable for receiving from an external device an erase request for an erase operation and a first logical address relating to the erase request, and correlating the first logical address to erase information.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 15, 2022
    Assignee: SK hynix Inc.
    Inventor: Byung-Jun Kim
  • Patent number: 11237973
    Abstract: A memory system includes a memory device and a controller. The memory device stores a piece of data in a location which is distinguished by a physical address. The controller generates map data, each piece of map data associating a logical address, inputted along with a request from an external device, with the physical address, selects a piece of map data among the map data based on a status regarding the piece of map data, and transfers selected map data to the external device.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: February 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Hye-Mi Kang, Eu-Joon Byun, Byung-Jun Kim, Seok-Jun Lee
  • Publication number: 20210264968
    Abstract: An electronic device includes a memory controller and a memory device. The memory controller that controls the memory device includes a write buffer to temporarily store write data received from a host, a write timing controller to receive temperature information indicating a temperature of the memory device and generate write timing information based on the temperature information, the write timing information indicating a write timing at which the write data is transferred to and stored in the memory device, and a write operation controller to control the write buffer and the memory device based on the write timing information such that the write data stored in the write buffer is transferred to and stored in the memory device.
    Type: Application
    Filed: August 11, 2020
    Publication date: August 26, 2021
    Inventor: Byung Jun KIM
  • Publication number: 20210223956
    Abstract: A memory system includes a storage medium, and a controller configured to move data temporarily stored in a memory to the storage medium in units of a batch size, and to generate durability information on the data stored in the memory based on the batch size, and to transmit the durability information to a host device.
    Type: Application
    Filed: July 7, 2020
    Publication date: July 22, 2021
    Inventor: Byung Jun KIM
  • Patent number: 11068427
    Abstract: An electronic device according to an embodiment of the present invention comprises: a universal serial bus (USB) interface; a processor electrically connected to the USB interface; and a memory electrically connected to the processor, wherein the memory may store instructions configured to, when executed, cause the processor to: enter a security mode; in the security mode, receive, from an external device connected to the electronic device via the USB interface, a USB class code corresponding to the external device; determine whether the USB class code is included in a white list of connectable devices allowed to be connected to the electronic device in the security mode; and control a communication connection between the external device and the electronic device according to whether the USB class code is included in the white list. Other embodiments are also possible.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: July 20, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Jun Kim, Dong-Rak Shin, Woo-Kwang Lee, Jae-Jin Lee
  • Patent number: 11029888
    Abstract: A memory system may include a memory device comprising a plurality of memory blocks and a controller suitable for controlling an operation of the memory device. The controller may perform a fake operation on a predetermined memory block not used to store data when a temperature of the memory device is in a low temperature range.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: June 8, 2021
    Assignee: SK hynix Inc.
    Inventor: Byung-Jun Kim
  • Publication number: 20210047172
    Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
    Type: Application
    Filed: November 2, 2020
    Publication date: February 18, 2021
    Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
  • Publication number: 20210046522
    Abstract: A water pipe cleaning system using high-pressure nitrogen and a water pipe cleaning method using the same are provided. The water pipe cleaning system using high-pressure nitrogen includes: nitrogen pressure vessels containing high-pressure nitrogen therein; a main control unit gathering the high-pressure nitrogen from the nitrogen pressure vessels and controlling pressure of the high-pressure nitrogen; a feed piping device connected to an outlet of the main control unit and connected to an inlet of a pipe to be washed; and a discharge piping device connected to an outlet of the pipe and connected to a nitrogen discharging portion to discharge nitrogen discharged from the pipe to the outside. The main control unit is configured such that control modules are stacked on one another. Each of the control modules is configured such that the nitrogen pressure vessels are connected together in parallel, and has an individual outlet.
    Type: Application
    Filed: December 21, 2018
    Publication date: February 18, 2021
    Inventors: Byung Jun KIM, Youn Ja JEN
  • Patent number: 10922223
    Abstract: A memory controller may control a memory device for storing logical to physical (L2P) mapping information, the memory controller comprising: a map data storage configured to store a plurality of L2P address segments included in the L2P mapping information; and a map data manager configured to: provide at least one L2P address segment of the plurality of L2P address segments to the host in response to a map data request of the host; and remove a L2P address segment from the map data storage, wherein the L2P address segment is selected, among the plurality of L2P address segments, based on a least recently used (LRU) frequency and whether the L2P address segment is provided to the host.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: February 16, 2021
    Assignee: SK hynix Inc.
    Inventors: Byung Jun Kim, Eu Joon Byun
  • Publication number: 20210042060
    Abstract: A memory controller having improved command scheduling performance controls a memory device. The memory controller includes a command queue and a command queue controller. The command queue stores a plurality of commands corresponding to a plurality of operation requests from a host, and outputs the plurality of commands to the memory device. The command queue controller controls the command queue to preferentially output, to the memory device, at least one target command corresponding to an urgent processing request from the host among the plurality of command, in response to the urgent processing request.
    Type: Application
    Filed: November 26, 2019
    Publication date: February 11, 2021
    Inventor: Byung Jun KIM
  • Publication number: 20210026748
    Abstract: A method for controlling temperature of a memory system which includes a memory device suitable for storing memory map data including a logical address of an external device and a physical address of a memory device, corresponding to the logical address; and a controller suitable for downloading at least a part of the memory map data and storing and managing the downloaded data as controller map data, and uploading at least a part of the controller map data to the external device, the method comprising: measuring temperature of the memory device; and performing a map downloading for the memory map data from the memory device in response to the measured temperature.
    Type: Application
    Filed: April 1, 2020
    Publication date: January 28, 2021
    Inventor: Byung-Jun KIM
  • Publication number: 20210004330
    Abstract: A memory controller, a memory system including the memory controller and a method for operating the memory system are disclosed. The memory controller updates a reference parameter for a memory area in which at least part of the mapping information is stored and determines whether to activate the memory area based on the reference parameter to effectively execute commands received from a host.
    Type: Application
    Filed: December 19, 2019
    Publication date: January 7, 2021
    Inventor: Byung Jun Kim
  • Publication number: 20200349068
    Abstract: A memory system includes a memory device comprising a memory block having a plurality of pages; and a controller suitable for receiving from an external device an erase request for an erase operation and a first logical address relating to the erase request, and correlating the first logical address to erase information.
    Type: Application
    Filed: December 23, 2019
    Publication date: November 5, 2020
    Inventor: Byung-Jun KIM
  • Publication number: 20200348887
    Abstract: A memory system may include a memory device comprising a plurality of memory blocks and a controller suitable for controlling an operation of the memory device. The controller may perform a fake operation on a predetermined memory block not used to store data when a temperature of the memory device is in a low temperature range.
    Type: Application
    Filed: December 20, 2019
    Publication date: November 5, 2020
    Inventor: Byung-Jun KIM
  • Patent number: 10822226
    Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 3, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
  • Publication number: 20200323468
    Abstract: An apparatus for analyzing an in vivo component is provided. The apparatus for analyzing an in vivo component may include an impedance sensor including a first electrode and a second electrode configured to contact a fluid channel of a fluid to be analyzed. The apparatus may include an impedance measurement device configured to apply a current to the first electrode and the second electrode, measure a voltage between the first electrode and the second electrode based on applying the current, and measure an impedance of the fluid based on the measured voltage. The apparatus may include a processor configured to model the measured impedance using an equivalent circuit; and analyze the in vivo component based on modeling the measured impedance using the equivalent circuit.
    Type: Application
    Filed: January 15, 2020
    Publication date: October 15, 2020
    Applicants: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sung YANG, Kun Sun EOM, Myoung Hoon JUNG, Byung Jun KIM, Alexander ZHBANOV, Seung Yeob LEE, Ye Sung LEE
  • Publication number: 20200327063
    Abstract: A memory system includes a memory device and a controller. The memory device stores a piece of data in a location which is distinguished by a physical address. The controller generates map data, each piece of map data associating a logical address, inputted along with a request from an external device, with the physical address, selects a piece of map data among the map data based on a status regarding the piece of map data, and transfers selected map data to the external device.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 15, 2020
    Inventors: Hye-Mi KANG, Eu-Joon BYUN, Byung-Jun KIM, Seok-Jun LEE