Abstract: A flash memory device has a page buffer circuit that has a dual page program function. The page buffer circuit is coupled to at least one pair of first bit lines and at least one pair of second bit lines.

Abstract: A counter that outputs a counting signal having a random counting value. The counter includes a clock generator and a counting circuit. The clock generator generates first and second clock signals with different phases based on an input clock signal. The counting circuit executes a counting operation and outputs a counting signal having a random counting value, in response to the first and second clock signals. The counter can output a counting signal having a random counting value. Accordingly, semiconductor devices to which the counter is applied can execute a variety of operations.

Abstract: A low power ROM includes a plurality of ROM core groups coupled between a plurality of word lines and bit lines, a word line decoder for selecting a desired word line of the plurality of word lines, a column decoder for selecting a desired bit line of the plurality of bit lines, a common reference voltage generator for generating a common reference voltage, and a plurality of sense amplifiers having the same number as the number of ROM core groups, for comparing an output of the common reference voltage generator and data of a bit line of each ROM core group.