Abstract: Some embodiments relate to micro vias in printed circuit boards (PCBs). In an example, a PCB may include a PCB substrate and a micro via. The micro via may extend between opposing surfaces of the PCB substrate and may have a diameter less than or equal to about 100 microns. In another example, a method of forming micro vias in a PCB may include forming a through hole in a PCB substrate of the PCB. The method may also include positioning a pillar that is electrically conductive within the through hole. The method may also include backfilling the through hole around the pillar with an epoxy backfill.

Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity for a few seconds. A proximity detector of a radio device detects the proximity of another radio device and an automatic registration process begins to configure a link between the devices. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity for a few seconds. A proximity detector of a radio device detects the proximity of another radio device and an automatic registration process begins to configure a link between the devices. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: This invention relates generally to an article that includes a non-wetting surface having a dynamic contact angle of at least about 90°. The surface is patterned with macro-scale features configured to induce controlled asymmetry in a liquid film produced by impingement of a droplet onto the surface, thereby reducing time of contact between the droplet and the surface.

Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity with hosts for a few seconds. A proximity detector in the device detects the proximity and an automatic registration process begins to configure a link between the device and nearby host. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: An active matrix electroluminescent display device has an array of current—driven electroluminescent display elements (20), for example comprising organic electroluminescent material, whose operations are each controlled by an associated switching means (10) to which a drive signal for determining a desired light output is supplied in a respective address period and which is arranged to drive the display element according to the drive signal following the address period. Each switching means comprises a current mirror circuit (24, 25, 30, 32) which samples and stores the drive signal with one transistor (24) of the circuit controlling the drive current through the display element (20) and having its gate connected to a storage capacitance (30) on which a voltage determined by the drive signal is stored. Through the use of current mirror circuits improved uniformity of light outputs from the display elements in the array is obtained.

Abstract: This invention relates generally to an article that includes a non-wetting surface having a dynamic contact angle of at least about 90°. The surface is patterned with macro-scale features configured to induce controlled asymmetry in a liquid film produced by impingement of a droplet onto the surface, thereby reducing time of contact between the droplet and the surface.

Abstract: A holding apparatus has: a first sleeve having a first arm and a first handle; a second sleeve having a second arm and a second handle; a coupling element that couples together the first and second sleeves about an axis of rotation, with an overlap between the first and second arms upon sufficient rotation of the second sleeve about the axis of rotation towards a closed position of the holding apparatus; an adjustable receiving structure formed of inwardly oriented receiving surfaces of the first and second arms and configured to receive and retain an object upon sufficient rotation of the second sleeve about the axis of rotation towards the closed position; a quick release mechanism; and an adjustable sizing element configured to be in releasable engagement with the quick release mechanism that releasably maintains an adjustable size of the adjustable receiving structure.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: Methods and apparatus for accessing a high speed signal routed on a conductive trace on an internal layer of a printed circuit board (PCB) using high density interconnect (HDI technology) are provided. The conductive trace may be coupled to a microvia (?Via) having a conductive dome disposed above the outer layer pad of the ?Via. In-circuit test (ICT) fixtures or high speed test probes may interface with the conductive dome to test the high speed signal with decreased reflection loss and other parasitic effects when compared to conventional test points utilizing plated through-hole (PTH) technology.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: A network for locating a wireless tag comprises a plurality of wireless nodes. The nodes are not connected together by a wired network. Each node is included in a floor tile for installation inside a building and configured to be wirelessly connectable to at least one other node. When the floor tiles are installed, the plurality of nodes form a mesh or grid and provide overlapping wireless coverage for locating the tag by reference to the mesh.

Abstract: A method of indicating the location of a relatively mobile object, comprising the steps of: (a) generating a first signal that is characteristic of a first, relatively immobile object; (b) transmitting the first signal from the first relatively immobile object; (c) detecting the first signal at a receiver; (d) generating a second signal that is characteristic of a second, relatively immobile object; (e) transmitting the second signal from the second, relatively immobile object; (f) detecting the second signal at a receiver; (g) generating a third signal that is characteristic of the relatively immobile object; (h) detecting the third signal at a receiver; (i) operating a processing device operatively connected to the receiver using signal time-of-flight (t-o-f) data and/or received signal strength information (RSSI) to establish the distance of the relatively mobile object respectively from the first and second relatively immobile objects; and (j) generating a signal indicating whether the relatively mobile o

Abstract: A system and method of providing a wheelchair accessible path through a variety of impact attenuating surfaces including loose fill materials. The combination of a tarmac and loose fill material provides an ASTM compliant impact attenuating surface for playgrounds and other activities. The modular tarmac 15 is also used in wet conditions to improve the traction and impact attenuation over traditional materials used in water parks, and also for reducing wear to park patrons' feet.

Abstract: A system and method of providing a wheelchair accessible path through a variety of impact attenuating surfaces including loose fill materials. The combination of a tarmac and loose fill material provides an ASTM compliant impact attenuating surface for playgrounds and other activities. The modular tarmac 15 is also used in wet conditions to improve the traction and impact attenuation over traditional materials used in water parks, and also for reducing wear to park patrons' feet.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: Methods and apparatus for accessing a high speed signal routed on a conductive trace on an internal layer of a printed circuit board (PCB) using high density interconnect (HDI technology) are provided. The conductive trace may be coupled to a microvia (?Via) having a conductive dome disposed above the outer layer pad of the ?Via. In-circuit test (ICT) fixtures or high speed test probes may interface with the conductive dome to test the high speed signal with decreased reflection loss and other parasitic effects when compared to conventional test points utilizing plated through-hole (PTH) technology.