Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

Abstract: A portable staircase includes a stairhead that can slide along a support track to extend and lock the stairhead away from a vehicle. The staircase can further be locked in either an upward storage or downward use position. Vertical support frame members provide support to the staircase when in the downward use position. A further embodiment of the staircase includes a vertical support frame member cover, along with a plurality of moveable vertical support frame members used to move the staircase into one of three positions: front-, right-side-, or left-side-facing.

Abstract: A digital couriering system and method for electronically moving records and images through a central user interface with a centralized security and access mechanism is disclosed. The disclosed system and method is a network that makes it possible for records comprising personal information and other non-personal information to be delivered in seconds via the Internet, instead of days through the use of the current standard couriers, such as messenger services or regular mail. Using the disclosed system and method, vital documents not only reach their destination more quickly but also in a more cost effective manner.

Abstract: A cholesteric liquid crystal display has pixel address circuits (84) with an input (12) for receiving a data signal and a plurality of outputs, wherein each output is for applying a pixel drive signal to a respective portion of the liquid crystal material (20), and wherein the pixel drive signal for each output is independently switchable by the pixel address circuit to each output. This provides spatially-separated sub-pixels, and a number of the sub-pixels can be addressed in order to provide a grey scale output for each pixel. Each pixel drive signal can however be a two-level digital signal.

Abstract: Touch switches are integrated with thermoformable, injection molded, and other substrates to yield integrated touch switch/control panel assemblies. The ensuant assemblies can include ridges, depressions, anchors, overlaps, rivets and bezels or other housings. They can have any combination of flat and curved surfaces. Further, such assemblies can be incorporated into components of other assemblies, such as automobiles.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A multiplexer circuit is disclosed for switching a selected one of a plurality of current inputs carried by respective input lines (2;101) to a common output. The circuit comprises, for each input line, a diode clamp (5;104) and isolation means (10;109) provided between each input line and the common terminal The diode clamp (5;104) is operable in a first mode in which voltages are applied to the clamp terminals such that the diodes (8,9;107,108) of the diode clamp are forward biased and hold the input line (2;101) at a first voltage which prevents the passage of current from the input line to the common output, and a second mode in which the voltages are applied to the clamp terminals such that the diodes of the diode clamp are reverse biased and the passage of the current from the input line to the common output is allowed. Only two connections, for the diode clamp, are needed to control the switching of the current input, and the switch introduces no current offset to the output.

Abstract: A multiplexer circuit is disclosed for switching a selected one of a plurality of current inputs carried by respective input lines (2;101) to a common output. The circuit comprises, for each input line, a diode clamp (5;104) and isolation means (10;109) provided between each input line and the common terminal The diode clamp (5;104) is operable in a first mode in which voltages are applied to the clamp terminals such that the diodes (8,9;107,108) of the diode clamp are forward biased and hold the input line (2;101) at a first voltage which prevents the passage of current from the input line to the common output, and a second mode in which the voltages are applied to the clamp terminals such that the diodes of the diode clamp are reverse biased and the passage of the current from the input line to the common output is allowed. Only two connections, for the diode clamp, are needed to control the switching of the current input, and the switch introduces no current offset to the output.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A display uses column address circuitry having a plurality of multiplexing switching arrangements (50), each of which is associated with two buffers (46a;46b) for providing selected pixel drive signals. The two buffers provide respective pixel drive signals simultaneously to two adjacent columns, such that the pixel drive signal for one column starts before the end of the pixel drive signal for the column driven previously, and ends after the end of the pixel drive signal for the column driven previously. This enables a reduction in the number of buffers required and reduces the cross talk between column signals for adjacent columns within the group of columns shared by each multiplexing arrangement. This is achieved by ensuring that any capacitive coupling between first and second columns is charged to a static level before the signal on one of the columns is switched off.

Abstract: A bistable chiral nematic liquid crystal display has pixel address circuits which comprise a first switching device (14) for switching a supply voltage to the remainder of the pixel address circuit and which is controlled by a row address line (10) and a second switching device (16) for allowing or preventing the supply voltage to be provided to the respective portion of the liquid crystal material (18), and Controlled by a column select line (32). This pixel layout and a method of driving the pixel address circuit, including use of a sample and hold circuit, enables a transition of the liquid crystal to the homeotropic or H state to be avoided when the pixel material is desired to remain in the P or FC states between frames, so that the black addressing bar artifact can be avoided.

Abstract: An electronic device (10) comprises an array of pixels (12), arranged in rows and columns (14,16) with row and column address lines (18,20) for addressing each pixel (12). Each row and column address line is connected to two discharge lines (30,32) through a discharge circuit (38). The circuit allows the passage of charge between the address line and the first discharge line (30) when the address line is at a potential below that of the first discharge line, and allows the passage of charge between the address line and the second discharge line (32) when the address line is at a potential above that of the second discharge line. This provides electrostatic discharge protection against an increase or decrease in voltage on the row or column address lines during manufacture of the device. By providing suitable voltages on the two discharge lines during operation of the manufactured device, it is possible to prevent the discharge circuit from operating, thereby saving power.

Abstract: An image sensor comprises rows and columns of pixels. Each pixel comprises an image sensing element and a switching device. The switching device enables a signal of the image sensing element to be provided to the associated column conductor. The switching device has two inputs—a first input defined by the row conductor, and a second input. Two adjacent columns of pixels are associated with each column conductor, and the two columns of pixels between adjacent column conductors are associated with a respective shared control line providing the second input. The switch arrangement with two inputs enables individual pixels to be isolated. The sharing of control lines between pairs of columns of pixels means that each pixel requires the same number of connections as in a conventional array with only a single switch control input.

Abstract: A display device has row driver circuitry (30) providing row address signals and column address circuitry (32) providing pixel drive signals. The row address signals comprise a plurality of voltage levels (V1-V4) to implement a desired drive scheme. The column address circuitry comprises circuitry (70) for generating low voltage representations of at least some of the row address signals. The row address circuitry comprises a conversion circuit (72) for converting the representations into the row address signal levels, at least one of has a high voltage magnitude. The invention provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.

Abstract: A display device has current-addressed pixels, with the currents being supplied by driver circuitry which comprises a transistor (10) for applying a charging voltage to a switched capacitor arrangement (Ci, S1, S2) arranged to selectively charge and discharge the capacitor (Ci) at a predetermined rate to a charging voltage. A transistor control voltage (Vref) is applied to a control terminal of the transistor which is adjusted depending on the transistor threshold voltage to ensure that the capacitor (Ci) is charged to the charging voltage irrespectively of the value of the threshold voltage. This enables an accurately controllable current to be provided which is used to drive the current-addressed pixels.

Abstract: An image sensor (10) includes an array having an image sensing portion (12) and a control portion (14). Pixels (18) of the image sensing portion and devices (20) of the control circuitry portion each have a diode stack (34) of a back-to-back switching diode (36, 38, 40) and a photodiode (42, 44, 46). The photodiodes of the devices (20) are constantly illuminated in use so that they act as current sources in series with the switching diode. This provides a circuit device which has characteristics enabling its use in control circuitry.

Abstract: A bistable chiral nematic liquid crystal display has pixel address circuits which comprise a first switching device (14) for switching a supply voltage to the remainder of the pixel address circuit and which is controlled by a row address line (10) and a second switching device (16) for allowing or preventing the supply voltage to be provided to the respective portion of the liquid crystal material (18), and controlled by a column select line (20). This pixel layout enables a transition to the H state to be avoided when the material is to remain in the P or FC states, so that the black addressing bar artifact can be avoided.

Abstract: An image sensor comprising an array of pixels 2, each pixel 2 including a pin or nip photodiode P. At least the intrinsic semiconductor layer of the photodiodes of a group of pixels is shared between those pixels and acts as a barrier to reduce edge leakage currents. A group of pixels may be a row of pixels, or may be all pixels of the array.