Abstract: Block processing pipeline methods and apparatus in which. motion estimation is performed at a stage of a motion estimation module for a current block with respect to a reference frame at one or more partition sizes to determine candidate motion vectors. The candidate motion vectors may be passed to a next stage for refinement. Motion estimation may then be performed at the next stage to refine the motion vectors. In performing motion estimation at this stage, the input motion vectors of at least one partition size received from the previous stage may be used as candidate motion vectors in searches for at least one other partition size.

Abstract: A component of an entropy encoding stage of a block processing pipeline (e.g., a CABAC encoder) may, for a block of pixels in a video frame, accumulate counts indicating the number of times each of two possible symbols is used in encoding a syntax element bin. An empirical probability for each symbol, an estimated entropy, and an estimated rate cost for encoding the bin may be computed, dependent on the symbol counts. A pipeline stage that precedes the entropy encoding stage may, upon receiving another block of pixels for the video frame, calculate and use the estimated rate cost when making encoding decisions for the other block of pixels based on a cost function that includes a rate cost term. The symbol counts or empirical probabilities may be passed to the earlier pipeline stage or written to a shared memory, from which components of the earlier stage may obtain them.

Abstract: The video encoders described herein may determine an initial designation of a mode in which to encode a block of pixels in an early stage of a block processing pipeline. A component of a late stage of the block processing pipeline (one that precedes the transcoder) may determine a different mode designation for the block of pixels based on coded block pattern information, motion vector information, the position of the block in a row of such blocks, the order in which such blocks are processed in the pipeline, or other encoding related syntax elements. The component in the late stage may communicate information to the transcoder usable in coding the block of pixels, such as modified syntax elements or an end of row marker. The transcoder may encode the block of pixels in accordance with the different mode designation or may change the mode again, dependent on the communicated information.

Abstract: Blocks of pixels from a video frame may be encoded in a block processing pipeline using wavefront ordering, e.g. according to knight's order. Each of the encoded blocks may be written to a particular one of multiple buffers such that the blocks written to each of the buffers represent consecutive blocks of the frame in scan order. Stitching information may be written to the buffers at the end of each row. A stitcher may read the rows from the buffers in order and generate a scan order output stream for the frame. The stitcher component may read the stitching information at the end of each row and apply the stitching information to one or more blocks at the beginning of a next row to stitch the next row to the previous row. Stitching may involve modifying pixel(s) of the blocks and/or modifying metadata for the blocks.

Abstract: A knight's order processing method for block processing pipelines in which the next block input to the pipeline is taken from the row below and one or more columns to the left in the frame. The knight's order method may provide spacing between adjacent blocks in the pipeline to facilitate feedback of data from a downstream stage to an upstream stage. The rows of blocks in the input frame may be divided into sets of rows that constrain the knight's order method to maintain locality of neighbor block data. Invalid blocks may be input to the pipeline at the left of the first set of rows and at the right of the last set of rows, and the sets of rows may be treated as if they are horizontally arranged rather than vertically arranged, to maintain continuity of the knight's order algorithm.

Abstract: A method is provided to remediate defects in first computer program code that can be used to configure a computer to produce code for use by the same or a different computer configured using second computer program code to use the produced code to produce output information, the method comprising: configuring a computer to perform static analysis of the first program to produce an information structure in a non-transitory computer readable storage device that associates a respective code statement of the first program code with a respective context, wherein the context associates a parser state with a potential defect in the produced code; identify a defect in the first computer program code that is associated with the respective code statement; and determining a remediation for the identified defect.

Abstract: A processor includes an execution pipeline configured to execute instructions for threads, wherein the architectural state of a thread includes a set of register windows for the thread. The processor also includes a physical register file (PRF) containing both speculative and architectural versions of registers for each thread. When an instruction that writes to a destination register enters a rename stage, the rename stage allocates an entry for the destination register in the PRF. When an instruction that has written to a speculative version of a destination register enters a commit stage, the commit stage converts the speculative version into an architectural version. It also deallocates an entry for a previous version of the destination register from the PRF. When a register-window-restore instruction that deallocates a register window enters the commit stage, the commit stage deallocates local and output registers for the deallocated register window from the PRF.

Abstract: A method and apparatus for determining data to be prefetched based on previous cache miss history is disclosed. In one embodiment, a processor includes a first cache memory and a controller circuit. The controller circuit is configured to load data from a first address into the first cache memory responsive to a cache miss corresponding to the first address. The controller circuit is further configured to determine, responsive to a cache miss for the first address, if a previous cache miss occurred at a second address. Responsive to determining that the previous cache miss occurred at the second address, the controller circuit is configured to load data from a second address into the first cache.

Abstract: The forward transform and quantization components of the video encoders described herein may modify the quantization typically performed by video encoders to reduce quantization artifacts. For example, for a given pixel in an image macroblock, noise may be generated based on information about pixels in the neighborhood of the given pixel (e.g., DC transform coefficients or quantization errors of the neighbor pixels and corresponding programmable weighting coefficient values for the neighbor pixels) and this noise may be added to the DC transform coefficient for the given pixel prior to performing quantization. The weighting coefficient values may be chosen to shape the noise added to the DC transform coefficient values (e.g., to apply a filter operation). When applied to a chroma component of an image frame, this neighbor-data-based dithering approach may reduce color banding artifacts. When applied to the luma component, it may reduce blocking artifacts.

Abstract: An imbedded mobile detection device includes a radiation detector, comprising a detection crystal and a photo-sensitive element, a radiation detector, an analog-digital converter (ADC), and a software application unit, wherein the detection crystal is a C:Al2O3 crystal having oxygen vacancy deficiencies formed by subjecting a carbon covered Al2O3 structure to vacuum diffusion and atmosphere annealing, when any radioactive particle exists in an on-spot environment, an energy thereof is absorbed through a recombination process of the vacancy deficiencies. Finally, the radiation energy spectrum analysis information is obtained through a measurement, by which some environmental radiations and waste containing radioactive material emitted from some radiation plants may be measured and analyzed, achieving the efficacy of an online measurement result processing and providing an accurate nuclide determination.

Abstract: A method for producing an optically stimulated luminescene (OSL) dosage detection crystal is disclosed, where an Al2O3 is first covered with carbon. The carbon atoms are diffused then in vacuum into the Al2O3 lattices. Then, the oxygen and carbon atoms react with each other in an anneal process under 1 atm. At this time, oxygen and the carbon atoms are enabled to react with each other, and thus C+O result in CO, or C+O2 form CO2, so that oxygen vacancy deficiencies are formed in the Al2O3 crystal. At this time, a uniformly carbon distributed crystal structure is thus simply obtained.

Abstract: A method is disclosed that uses a non-coherent store instruction to reduce inter-thread communication latency between threads sharing a level one write-through cache. When a thread executes the non-coherent store instruction, the level one cache is immediately updated with the data value. The data value is immediately available to another thread sharing the level-one write-through cache. A computer system having reduced inter-thread communication latency is disclosed. The computer system includes a first plurality of processor cores, each processor core including a second plurality of processing engines sharing a level one write-through cache. The level one caches are connected to a level two cache via a crossbar switch. The computer system further implements a non-coherent store instruction that updates a data value in the level one cache prior to updating the corresponding data value in the level two cache.

Abstract: A method is provided to infer taintedness in code expressions encoded in a computer readable device comprising: configuring a computer system to, store a representation of a computer program that is to be evaluated in non-transitory storage media; identify within the representation a pointer cast operation; determine whether an identified cast operation involves a cast from a pointer to a raw memory data type to a pointer to a structured data type; determine whether a structured data type casted to is associated with indicia of externalness; designating data addressed by that pointer as tainted; and determine whether data designated as tainted is consumed by an operation in the computer program that acts as a taintedness sink.

Abstract: The disclosed embodiments relate to a system that selectively filters out redundant software prefetch instructions during execution of a program on a processor. During execution of the program, the system collects information associated with hit rates for individual software prefetch instructions as the individual software prefetch instructions are executed, wherein a software prefetch instruction is redundant if the software prefetch instruction accesses a cache line that has already been fetched from memory. As software prefetch instructions are encountered during execution of the program, the system selectively filters out individual software prefetch instructions that are likely to be redundant based on the collected information, so that likely redundant software prefetch instructions are not executed by the processor.

Abstract: A system that executes program instructions on a processor is described. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system speculatively executes subsequent instructions in a lookahead mode to prefetch future loads. While executing in the lookahead mode, if the processor determines that the lookahead mode is unlikely to uncover any additional outer-level cache misses, the system terminates the lookahead mode. Then, after the unresolved data dependency is resolved, the system recommences execution in the normal-execution mode from the instruction that triggered the lookahead mode.

Abstract: Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.

Abstract: A knight's order processing method for block processing pipelines in which the next block input to the pipeline is taken from the row below and one or more columns to the left in the frame. The knight's order method may provide spacing between adjacent blocks in the pipeline to facilitate feedback of data from a downstream stage to an upstream stage. The rows of blocks in the input frame may be divided into sets of rows that constrain the knight's order method to maintain locality of neighbor block data. Invalid blocks may be input to the pipeline at the left of the first set of rows and at the right of the last set of rows, and the sets of rows may be treated as if they are horizontally arranged rather than vertically arranged, to maintain continuity of the knight's order algorithm.

Abstract: The video encoders described herein may make an initial determination to designate a macroblock as a skip macroblock, but may subsequently reverse that decision based on additional information. For example, an initial skip mode decision may be based on aggregate distortion metrics for the luma component of the macroblock (e.g., SAD, SATD, or SSD), then reversed based on an individual pixel difference metric, an aggregate or individual pixel metric for a chroma component of the macroblock, or on the position of the macroblock within a macroblock row. The final skip mode decision may be based, at least in part, on the maximum difference between any pixel in the macroblock (or in a region of interest within the macroblock) and the corresponding pixel in a reference frame. The initial skip mode decision may be made during an early stage of a pipelined video encoding process and reversed in a later stage.

Abstract: In the video encoders described herein, blocks of pixels from a video frame may be encoded (e.g., using CAVLC encoding) in a block processing pipeline using wavefront ordering (e.g., in knight's order). Each of the encoded blocks may be written to a particular one of multiple DMA buffers such that the encoded blocks written to each of the buffers represent consecutive blocks of the video frame in scan order. A transcode pipeline may operate in parallel with (or at least overlapping) the operation of the block processing pipeline. The transcode pipeline may read encoded blocks from the buffers in scan order and merge them into a single bit stream (in scan order). A transcoder core of the transcode pipeline may decode the encoded blocks and encode them using a different encoding process (e.g., CABAC). In some cases, the transcoder may be bypassed.

Abstract: Blocks of pixels from a video frame may be encoded in a block processing pipeline using wavefront ordering, e.g. according to knight's order. Each of the encoded blocks may be written to a particular one of multiple buffers such that the blocks written to each of the buffers represent consecutive blocks of the frame in scan order. Stitching information may be written to the buffers at the end of each row. A stitcher may read the rows from the buffers in order and generate a scan order output stream for the frame. The stitcher component may read the stitching information at the end of each row and apply the stitching information to one or more blocks at the beginning of a next row to stitch the next row to the previous row. Stitching may involve modifying pixel(s) of the blocks and/or modifying metadata for the blocks.