Abstract: A circuit board and process thereof are provided. The circuit board includes a dielectric layer, an active circuit, and two shielding circuits. The dielectric layer has an active surface. The active circuit is disposed on the active surface, and the shielding circuits are respectively disposed on two sides of the active circuit. The height of the shielding circuits is larger than the height of the active circuit.

Abstract: The present invention relates to a power management system comprising at least one power management subsystem. Each power management subsystem comprises a first power module coupled to a first load and comprising at least one first power supply for supplying power to the first load; a second power module coupled to a second load and comprising at least one second power supply, wherein at least one second power supply is retractably installed in the second power module and selectively coupled to the second load; and a pass-through module comprising at least one pass-through unit retractably installed in the second power module to replace with the at least one second power supply and selectively connecting the first power module to the second load for allowing the first power module to supply power to the second load.

Abstract: A circuit board and process thereof are provided. The circuit board includes a dielectric layer, a main circuit, and two shielding circuits. The dielectric layer has an active surface. The main circuit is embedded in the dielectric layer and the shielding circuits are disposed at the dielectric layer. The shielding circuits are respectively located at two sides of the main circuit. The thickness of the shielding circuits is larger than the thickness of the main circuit.

Abstract: A process for fabricating a circuit board is provided. In the process, first, a circuit substrate including an insulation layer and at least a pad contacting the insulation layer is provided. Next, a barrier material layer is formed on the circuit substrate. The barrier material layer completely covers the insulation layer and the pad. Then, at least one conductive bump is formed on the barrier material layer. The conductive bump is opposite to the pad, and the material of the barrier material layer is different from the material of the conductive bump. Next, a portion of the barrier material layer is removed by using the conductive bump as a mask, so as to expose the surface of the insulation layer and to form a barrier connected between the conductive bump and the pad.

Abstract: An embedded chip package process is disclosed. First, a first substrate having a first patterned circuit layer thereon is provided. Then, a first chip is disposed on the first patterned circuit layer and electrically connected to the first patterned circuit layer. A second substrate having a second patterned circuit layer thereon is provided. A second chip is disposed on the second patterned circuit layer and electrically connected to the second patterned circuit layer. Afterwards, a dielectric material layer is formed and covers the first chip and the first patterned circuit layer. Then, a compression process is performed to cover the second substrate over the dielectric material layer so that the second patterned circuit layer and the second chip on the second substrate are embedded into the dielectric material layer.

Abstract: The present disclosure provides an image sensor semiconductor device. A semiconductor substrate having a first-type conductivity is provided. A plurality of sensor elements is formed in the semiconductor substrate. An isolation feature is formed between the plurality of sensor elements. An ion implantation process is performed to form a doped region having the first-type conductivity substantially underlying the isolation feature using at least two different implant energy.

Abstract: Methods and apparatus are provided for reducing and/or substantially eliminating sensitivity mismatch of acoustic receivers used with acoustic sources to determine acoustic properties of geologic formations as a logging tool traverses the formations. Methods are directed to detecting waveform arrival times at receivers, determining places in a well where arrival times of waves are substantially the same at a plurality of receivers, and estimating effective receiver sensitivities and equalization factors using Stoneley wave amplitudes and windowed deconvolution of Stoneley waves. Methods are further directed to correcting wave amplitudes using estimated effective receiver sensitivities and equalization factors for receivers.

Abstract: A package substrate including a circuit board, a reinforcing plate and at least one conductive channel is provided. A first surface of the reinforcing plate is disposed on the circuit board for resisting the warpage of the circuit board. The reinforcing plate has an opening corresponding to a first contact of the circuit board exposed thereon. In addition, one end of the conductive channel is located in the opening and electrically connected to the first contact, and the other end of the conductive channel is located on a second surface of the reinforcing plate to form a bonding pad.

Abstract: An embedded chip package process is provided. First, a chip is connected to a first circuit layer on a carrier, and then a cover plate is pressed onto a dielectric material layer to make the chip embedded in the dielectric material layer so that a circuit board with an embedded chip is formed. The chip has at least a bump electrically connected to a bonding pad of the first circuit layer through a solder. With enhanced reliability and alignment in chip bonding, the flip-chip bonding process replaces the conventional method of Laser drilling and circuit fabrication.

Abstract: An embedded chip package process is disclosed. First, a first substrate having a first patterned circuit layer thereon is provided. Then, a first chip is disposed on the first patterned circuit layer and electrically connected to the first patterned circuit layer. A second substrate having a second patterned circuit layer thereon is provided. A second chip is disposed on the second patterned circuit layer and electrically connected to the second patterned circuit layer. Afterwards, a dielectric material layer is formed and covers the first chip and the first patterned circuit layer. Then, a compression process is performed to cover the second substrate over the dielectric material layer so that the second patterned circuit layer and the second chip on the second substrate are embedded into the dielectric material layer.

Abstract: A fabrication process of a conductive column suitable for a fabrication of a circuit board. The circuit board comprises a dielectric layer. A first blind hole is formed in the dielectric layer from a second surface opposite to the first surface, wherein the blind end of the first blind hole connects to the blind end of the second blind hole. The first blind hole and the second blind hole constitute a through hole. The through hole is formed in an hourglass shape such that an inner diameter of the through hole near the first or the second surface is substantially larger than an inner diameter of the through hole near a middle portion of the through hole. A conductive material is filled in the though hole to form a conductive column.

Abstract: A handheld computer enables an operator to authenticate an ID, determine if an ID holder is above a minimum age, and enables the collection of data about the ID holder if the ID holder is determined to be above the minimum age. The computer also displays an optional video after the age verification process is completed.

Abstract: Methods and systems are provided which convey access control information from a first server to a second server through an end user device, for example in a system in which these servers and devices are all connected to the Internet. The method starts after the first server receives a message from the end user device. The first server in response to this message from the end user device sends a response message to the end user device containing the access control information to be conveyed to the second server, optionally after performing authentication. The response message also contains an instruction for the end user device to post a second message to the second server containing the information. The information is preferably contained in a content portion of the message. A hidden form may be used in the response message to contain the information. Optionally, the end user may be presented with an option to post the second message or not.

Abstract: A fabrication process of a conductive column suitable for a fabrication of a circuit board is provided. The circuit board comprises a dielectric layer. A first blind hole is formed in the dielectric layer from a first surface thereof, and a second blind hole is formed in the dielectric layer from a second surface opposite to the first surface, wherein the blind end of the first blind hole connects to the blind end of the second blind hole. The first blind hole and the second blind constitute a through hole and is formed in an hourglass shape such that an inner diameter of the through hole near to the first or the second surface is substantially larger than an inner diameter of the through hole near a middle portion of the through hole. A conductive material is filled in the through hole to form a conductive column.

Abstract: The present invention discloses a color display system. The color display system includes a plurality of light emitting polymer (LEP) optical fibers each formed as plurality of light-emitting segments for emitting a specific color by using a special light emitting polymer. The light emitting segments are arranged as a two-dimensional array with each of the light emitting segments controlled to turn on and off for presenting a color image by turning on a plurality of the light emitting segments. In a preferred embodiment, each of the light emitting segments includes an indium/tin oxide (ITO) layer segment covering the LEP optical fiber wherein each of the ITO segments is connected to an ITO control voltage for turning on and off the light emitting segment.

Abstract: A waterproof and heat-dissipating structure of an electronic apparatus including a circuit board, an input element and an output element is disclosed. The structure includes an aluminum-wrapped housing having at least four adjoining surfaces for defining a space, a first opening end and a second opening end, wherein the space is used for accommodating the circuit board, a first lateral plate fixed to the aluminum-wrapped housing, covering the first opening end and having a first hole for fixing the input element therein, and a second lateral plate fixed to the aluminum-wrapped housing, covering the second opening end and having a second hole for fixing the output element therein.

Abstract: The present invention discloses an acoustic voice cancellation system for generating a non-interference zone. The acoustic system includes an input transducer for receiving an acoustic input signal from a speaker to a signal processor. The acoustic system further includes a subsystem for providing a non-interfering environment The subsystem for providing non-interfering environment generates an acoustic cancellation signal for destructively interfering with the acoustic input signal at a distance away from the speaker. In a preferred embodiment, the subsystem for providing a non-interfering environment further includes an acoustic attenuation means for generating a cancellation acoustic signal for destructively interfering with the acoustic input signal. In another preferred embodiment, the subsystem for providing a non-interfering environment further includes a signal transmission means for transmitting the cancellation acoustic signal to the distance away from the speaker.

Abstract: A method of forming an integrated circuit package with an upward-facing chip cavity such that the fabrication of the substrate and the packaging of silicon chip are combined. By forming a patterned dielectric layer to expose bonding pads on a silicon chip and subsequently connecting the bonding pad on the chip with trace lines on the substrate through electroplating, reliable connections between the chip and substrate are formed and no more bubbles are formed inside the dielectric layer.

Abstract: The present invention discloses an optical energy collecting system for providing optical power to a display system for showing an image. The optical energy collection system includes an optical energy collecting system for collecting optical energy from a background illumination source surrounding and illuminating on the display system whereby an optical energy provided by said optical energy collecting system to said display system for illumination is naturally adjusted according to a background illumination of the background illumination source surrounding the display system.

Abstract: A hole metal-filling method, applied to hole filling and electroplating a printed circuit board which has been mechanical-drilled with holes. A plurality of holes is drilled in a substrate. The substrate is placed on a platform. A plurality of metal balls is disposed on a surface of the substrate. By vibrating the platform, a part of the metal balls roll into the holes, while the metal balls not rolling into the holes are removed. The substrate is then placed on a press down unit. The metal balls in the holes are pressed to level with surfaces of the substrate. The substrate is directly electroplated for forming a plating layer closely dovetail to the metal balls.