Patents by Inventor C. H. Cheng
C. H. Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030134455Abstract: A method of forming an integrated circuit package with an upward-facing chip cavity such that the fabrication of the substrate and the packaging of silicon chip are combined. By forming a patterned dielectric layer to expose bonding pads on a silicon chip and subsequently connecting the bonding pad on the chip with trace lines on the substrate through electroplating, reliable connections between the chip and substrate are formed and no more bubbles are formed inside the dielectric layer.Type: ApplicationFiled: January 15, 2002Publication date: July 17, 2003Inventors: Jao-Chin Cheng, Chih-Peng Fan, David C. H. Cheng
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Publication number: 20030082896Abstract: A hole metal-filling method, applied to hole filling and electroplating a printed circuit board which has been mechanical-drilled with holes. A plurality of holes is drilled in a substrate. The substrate is placed on a platform. A plurality of metal balls is disposed on a surface of the substrate. By vibrating the platform, a part of the metal balls roll into the holes, while the metal balls not rolling into the holes are removed. The substrate is then placed on a press down unit. The metal balls in the holes are pressed to level with surfaces of the substrate. The substrate is directly electroplated for forming a plating layer closely dovetail to the metal balls.Type: ApplicationFiled: October 30, 2001Publication date: May 1, 2003Inventor: David C. H. Cheng
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Patent number: 6506633Abstract: A method of fabricating a multi-chip module (MCM) package that can fabricate the substrate and the package simultaneously. The bonding pads of a chip are exposed by forming a patterned dielectric layer, and the bonding pads of the chip are electrically connected to the substrate by utilizing to an electroplating to form a metal layer. The present invention provides a fabircating method that can prevent air bubble produced in the patterned dielectric layer and improve the connection ability between the chip and the substrate.Type: GrantFiled: February 15, 2002Date of Patent: January 14, 2003Assignee: Unimicron Technology Corp.Inventors: Jao-Chin Cheng, Chih-Peng Fan, David C. H. Cheng
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Patent number: 6506632Abstract: A method of forming an integrated circuit package with a downward-facing chip cavity. A substrate comprising an insulating core layer and a conductive layer is provided. A through-hole is formed in the substrate and an adhesive tape is attached to the surface of the conductive layer. A silicon chip is attached to the exposed adhesive tape surface at the bottom of the first opening. The chip has an active surface and a back surface. The chip further includes a plurality of bonding pads on the active surface. The back surface of the chip is attached to the adhesive tape. A patterned dielectric layer is formed filling the first opening and covering a portion of the adhesive tape, the active surface, the bonding pad and the insulating core layer. The patterned dielectric layer has a plurality of openings that exposes the bonding pads and some through holes. A metallic layer is formed over the exposed surface of the openings and the upper surface of the patterned dielectric layer by electroplating.Type: GrantFiled: February 15, 2002Date of Patent: January 14, 2003Assignee: Unimicron Technology Corp.Inventors: Jao-Chin Cheng, Chih-Peng Fan, David C. H. Cheng
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Patent number: 6492908Abstract: The present invention discloses a personal computer that has circuit elements enclosed in a light transmissible case. The personal computer further includes a visible light enclosed in the light-transmissible case for providing indication of various functional statuses of the personal computer through the light transmissible case. In a preferred embodiment, the personal computer further includes a light controller for controlling the visible light for providing a plurality of visible light signals for indicating various functional statuses of the personal computer. In another preferred embodiment, the light controller further includes a light intensity controller for controlling an intensity of the visible light for indicating various functional statuses of the personal computer. In another preferred embodiment, the light controller further includes a light flash-pattern controller for controlling a flash-pattern of the visible light for indicating various functional statuses of the personal computer.Type: GrantFiled: October 6, 1999Date of Patent: December 10, 2002Assignee: Delta Electronics, Inc.Inventor: Bruce C. H. Cheng
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Patent number: 6353999Abstract: A mechanical-laser structure on a printed circuit board and a carrier. A method for fabricating the mechanical-laser structure includes the following steps. A substrate is provided. A first through hole is formed in the substrate by mechanical drilling. An epoxy plug is formed within the first through hole. A conductive layer is formed on the substrate by compression. The conductive layer is patterned to form conducting wires and exposes the epoxy plug. A micro via is formed within the epoxy plug by laser drilling.Type: GrantFiled: May 6, 1999Date of Patent: March 12, 2002Assignee: Unimicron Taiwan Corp.Inventor: David C. H. Cheng
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Patent number: 6346012Abstract: The present invention discloses a direct-current (DC) electric connector that includes plurality of conductive and insulation layers constituting a near-zero inductance connector. The connector further includes a top and a bottom insulation-and-protection covers covering and protecting the plurality of conductive and insulation layers. The top and bottom insulation-and-protection covers having a tapered outer surface for providing a tapered profile along a horizontal direction toward a connector opening for receiving a printed circuit board into the near-zero inductance connector. The connector further includes a locking cartridge for adaptively enclosing the near-zero inductance connector with the printed circuit board inserted therein. The locking cartridge has top and bottom surfaces each engages the top and bottom insulation-and-protection covers respectively for horizontally pushing toward a direction having a gradually increased profile height for generating a vertical pressing force.Type: GrantFiled: February 23, 2000Date of Patent: February 12, 2002Assignee: Delta Electronics, Inc.Inventors: Bruce C. H. Cheng, Timothy Chen-Yu Yu, Kelly Jui-Yuan Shyu, Szu-Lu Huang
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Publication number: 20010006117Abstract: A mechanical-laser structure on a printed circuit board and a carrier. A method for fabricating the mechanical-laser structure includes the following steps. A substrate is provided. A first through hole is formed in the substrate by mechanical drilling An epoxy plug is formed within the first through hole. A conductive layer is formed on the substrate by compression. The conductive layer is patterned to form conducting wires and exposes the epoxy plug. A micro via is formed within the epoxy plug by laser drilling.Type: ApplicationFiled: February 28, 2001Publication date: July 5, 2001Inventor: David C. H. Cheng
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Publication number: 20010000156Abstract: A method for forming package board for carrying a low pin count IC chip. A hard resin substrate board is provided. Through vias are formed in locations where ball grid pads are needed. A conductive layer that also covers the vias is attached to the surface of the board using a glue material. The conductive layer is patterned to form a conductive line layer. Ball grid pad regions on the conductive line layer are located above the vias. A soldering mask that covers a portion of the conductive line layer but exposes a plurality of bonding pad regions above the conductive line layer is formed. An electroplated layer is formed over the bonding pad regions.Type: ApplicationFiled: November 29, 2000Publication date: April 5, 2001Inventor: David C. H. Cheng
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Patent number: 6210746Abstract: A method for fabricating a solder mask. A substrate having wires is provided, and bonding pads are positioned on the wires for coupling with other devices. A first solder resist layer is formed over the substrate to cover the wires and the substrate. A precure process is performed. A portion of the first solder resist layer is removed to expose the wires, and then the residual first solder resist layer is cured. A second solder resist layer is formed to cover the residual first solder resist layer and the wires. After precuring, a portion of the second solder resist layer is removed to expose the bonding pads.Type: GrantFiled: May 28, 1999Date of Patent: April 3, 2001Assignee: Unimicron Taiwan Corp.Inventor: David C. H. Cheng
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Patent number: 6201300Abstract: A printed circuit board thermal conductive structure comprises a thermal spreader layer having an embossed pattern formed on its surface, an adhesive glue layer formed over the thermal spreader, and a surface metallic layer attached to the thermal spreader and the glue layer. A portion of the surface metallic layer is in direct contact or almost direct contact with the thermal spreader. Furthermore, an additional external heat sink can be attached to thermal conductive structure to increase the efficiency of heat dissipation.Type: GrantFiled: August 24, 1998Date of Patent: March 13, 2001Assignee: World Wiser Electronics Inc.Inventors: Tzyy-Jang Tseng, David C. H. Cheng, Shaw-Wen Lao
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Patent number: 6175497Abstract: A thermal vias-provided cavity-down IC package structure of the invention is provided. The thermal vias-provided cavity-down IC package structure includes a substrate, a heat sink and an adhesive layer for attaching the substrate to the heat sink. The substrate is formed of multiple layers of printed circuit boards which are attached to each other, and have a cavity formed at the center thereof. A plurality of thermal vias is formed surrounding the substrate. The head sink is divided into a chip mount area and a thermal via joint area. The chip mount area is used for a chip mount pad to be disposed thereon, wherein a chip is connected to the heat sink through the chip mount pad. The thermal via area is electrically coupled to the thermal vias thereby to form an approximate short path or a short path. Thus, heat energy is transferred not only by the heat sink directly, but also from the heat sink to the substrate through the thermal vias.Type: GrantFiled: March 11, 1999Date of Patent: January 16, 2001Assignee: World Wiser Electronics Inc.Inventors: T. J. Tseng, David C. H. Cheng
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Patent number: 6098021Abstract: A system and method to determine an in-situ stress field based on borehole acoustic monopole and cross-dipole measurements. A radially polarized monopole shear-wave is generated in a borehole. It is then determined whether the shear-wave has split into two shear-waves. If it has, the difference in velocities between the two split shear-waves is used to determine the stress induced anisotropy around and near the borehole. The difference in velocities of cross-dipole shear-waves and the direction of the fast shear-wave are measured and used to determine the magnitude of the maximum shear stress and the maximum stress orientation of the geologic formation. Furthermore, a method of determining the stress-velocity coupling coefficients from laboratory measurements as well as through field measurement calibration is disclosed. The effect of borehole pressure on the field measurement calibration method of determining the stress-velocity coupling coefficients is taken into account.Type: GrantFiled: January 15, 1999Date of Patent: August 1, 2000Assignee: Baker Hughes IncorporatedInventors: Xiaoming Tang, Ningya Cheng, Arthur C. H. Cheng
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Patent number: 6081425Abstract: The present invention discloses a power supply for providing power from an external power source to a portable electronic device. The portable power supply system includes electronic circuits including an AC-to-DC converter for converting the power from the external power source for the portable electronic device. The portable power supply system further includes a printed circuit board for supporting the electronic circuits thereon. The portable power supply system further includes an inner enclosure for enclosing and protecting the electronic circuits supported on the printed circuit board wherein the inner enclosure composed of heat conductive materials. The portable power supply system further includes an external container for containing and protecting the portable power supply system wherein the external container further includes a plurality of air vents for allowing heat dissipation therefrom.Type: GrantFiled: January 2, 1999Date of Patent: June 27, 2000Assignee: Delta Electronics, Inc.Inventor: Bruce C. H. Cheng
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Patent number: 6032355Abstract: A method of manufacturing a thermal conductive structure on a printed circuit board comprises the steps of forming a thermal conductive layer having an embossed pattern on its surface, and then forming an adhesive glue layer over the thermal conductive layer. Next, a surface metallic layer is attached to the thermal conductive layer and the glue layer, wherein a portion of the surface metallic layer corresponding to the embossed portion of the heat spreader is in direct contact or almost direct contact with the thermal conductive layer. Furthermore, an additional external heat sink can be attached to thermal conductive structure for increasing the efficiency of heat dissipation.Type: GrantFiled: August 6, 1998Date of Patent: March 7, 2000Assignee: World Wiser Electronics, Inc.Inventors: Tzyy-Jang Tseng, David C. H. Cheng
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Patent number: 5798660Abstract: A cascoded differential amplifier with a circuit for the injection of current to enhance the gain is described. The differential amplifier includes a differential pair of n-MOS FET's connected to a current source an a positive and a negative input terminal. A pair of isolation n-MOS FET's are inserted between the differential pair and a pair of current source loads. These isolate the current source loads from the differential pair. A current injector is connected to the drains of the n-MOS FET's of the differential pair. The isolation n-MOS FET's and the injected currents enhance the gain of the differential amplifier. A level translation circuit adjusts the output levels of the differential pair to levels required by circuitry attached to the output terminals of the level translation circuitry.Type: GrantFiled: June 13, 1996Date of Patent: August 25, 1998Assignee: Tritech Microelectronics International Pte Ltd.Inventor: Michael C. H. Cheng
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Patent number: 5784333Abstract: A method for determining the permeability of earth formations penetrated by a wellbore from acoustic signals measured by an acoustic wellbore logging instrument. The method includes separating components from the measured acoustic signals which represent Stoneley waves propagating through the earth formations. Signals representing Stoneley waves propagating through the same earth formations are synthesized. The separated acoustic signal components and the synthesized Stoneley wave signals are compared. The permeability is determined from differences between the synthesized Stoneley wave signals and the separated acoustic signal components. In a preferred embodiment, the step of calculating the permeability includes inversion processing a wave center frequency shift and a wave travel time delay with respect to the permeability of the earth formations.Type: GrantFiled: May 21, 1997Date of Patent: July 21, 1998Assignee: Western Atlas International, Inc.Inventors: Xiaoming Tang, Stephan Gelinsky, Raghu K. Chunduru, Arthur C. H. Cheng
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Patent number: 5781911Abstract: A system and method is capable of providing a much more effective enterprise-wide decision support system. It consists of an integrated end-to-end solution including automatic generation of data warehouses or data marts integrated with automatic delivery of information from the data warehouses or data marts to knowledge workers throughout the enterprise using a "publish and subscribe" paradigm for dissemination of the information at any time, to any places, in any formats to any number of knowledge workers. This integration allows information in the data warehouses or data marts to be delivered immediately after every refresh of the data warehouses or data marts thereby allowing maximum utilization of the valuable information in the data warehouses or data marts throughout the enterprise to gain the most optimum decision support.Type: GrantFiled: September 10, 1996Date of Patent: July 14, 1998Assignee: D2K, IncorporatedInventors: Edward T. Young, Dennis Yong, Lim Liat, James K. C. Tong, Viktor C. H. Cheng, Judy K. Rawls
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Patent number: 5487132Abstract: An end user query technology is taught which is capable of automatically understanding the database model and guiding the user to scout for the desired information, thereby increasing productivity and ease of information access. The user is freed from the need to understanding the database model, with the end user query facility of this invention quickly guiding the user to acquire the information. This is made possible by the end user query facility of this invention first recapturing the application semantics from the existing database model to provide a set of derived semantics. The derived semantics are then used by the end user query facility to intelligently guide the user to scout for the desired information in the database. In addition, the derived semantics can be easily updated by the end user query facility when the database model is changed.Type: GrantFiled: November 30, 1994Date of Patent: January 23, 1996Inventor: Viktor C. H. Cheng
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Patent number: D462280Type: GrantFiled: June 28, 2001Date of Patent: September 3, 2002Assignee: Citizen Watch Co., Ltd.Inventor: Benjamin C. H. Cheng