Abstract: The present disclosure provides an organic light emitting diode (OLED) display device and control method thereof. The OLED display device includes: a plurality of subpixels that are arranged in an array having a plurality of rows and a plurality of columns, wherein at least one of the subpixels comprises a control transistor, a light emitting element, and a drive transistor for driving the light emitting element; a plurality of detection lines, wherein at least one of the detection lines is electrically connected with the control transistors of subpixels in a same column, for detecting an electrical property of the drive transistors of subpixels in the same column through respective control transistors; and a plurality of group detection control lines, wherein at least one of the group detection control lines is electrically connected with control transistors of a subpixel group, the subpixel group comprising subpixels in a first row and subpixels in a second row.

Abstract: The present disclosure provides a display panel, a method thereof and a display device. The display panel includes a gate line group, a gate driving circuit, and a sub-pixel unit group. The sub-pixel unit group includes N rows of sub-pixel units, the gate line group includes (N+1) gate lines. The sub-pixel unit includes a light emitting unit, a pixel driving circuit, and a sensing circuit. The gate driving circuit includes output terminals, and is configured to sequentially output gate scanning signals through the output terminals. Each gate line is coupled to one corresponding output terminal. In the sub-pixel unit group, the pixel driving circuit in a sub-pixel unit in an n-th row is coupled to an n-th gate line; and the sensing circuit in the sub-pixel unit in the n-th row is coupled to a (n+1)-th gate line, where 1?n?N, and n is an integer.

Abstract: Provided are a shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus. The shift register unit may include: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal; and a pull-up node of the first shift register is coupled to a pull-up node of the second shift register.

Abstract: Provided are a pixel structure, a display panel and a control method thereof. The pixel structure includes four sub-pixel units, wherein the i-th sub-pixel unit includes: an i-th element to be driven and an i-th drive circuit, 1?i?4, and the i-th drive circuit is respectively connected with an M-th data line and an N-th scanning line, and is configured to drive the i-th element to be driven according to a data signal of the M-th data line under control of the N-th scanning line, M = { 1 , 1 ? i ? 2 2 , 3 ? i ? 4 , N = { 1 , 2 ? i ? 3 2 , i ? ? is ? ? 1 ? ? or ? ? 4 .

Abstract: A shift register unit includes a pull-down sustaining sub-circuit and a pull-down sub-circuit. The pull-down sustaining sub-circuit includes: a first transistor having a control electrode configured to input a pull-down sustaining signal, a first electrode connected to a first power signal terminal, and a second electrode connected to a pull-down node; a first capacitor; and a second transistor having a control electrode connected to an input signal terminal. The pull-down sub-circuit includes: a third transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to a pull-up node, and a second electrode connected to the second power signal terminal; a fourth transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to an output sub-circuit, and a second electrode connected to the second power signal terminal.

Abstract: A pixel driving circuit, array substrate, display device and method for driving the pixel driving circuit are provided, the circuit includes: a control terminal and a first terminal of a driving switch circuit are respectively coupled to a first terminal of a data input switch circuit and an anode of a light-emitting device, and two terminals of a storage capacitor are respectively coupled to the control terminal of the driving switch circuit and the anode of the light-emitting device, two terminals of an intrinsic capacitor are respectively coupled to a cathode and the anode of the light-emitting device, a first terminal and a second terminal of a reset switch circuit are respectively coupled to the anode and the cathode of the light-emitting device, a capacitance of the intrinsic capacitor is greater than or equal to a preset multiple of a capacitance of the storage capacitor.

Abstract: Embodiments of the present disclosure provide a pixel circuit, a display panel, and a display device. The pixel circuit includes: a first transistor; a light emitting unit, a cathode being grounded; a second transistor; a third transistor; a fourth transistor; and a capacitor, a first terminal being coupled to the control electrode of the third transistor, and a second terminal being coupled to the second electrode of the third transistor.

Abstract: The present disclosure discloses a pixel circuit and a method of controlling the same. The pixel circuit includes: a light-emitting control sub-circuit, configured to transmit a data voltage at a data signal terminal to a first node under control of a first control terminal; a driving sub-circuit, configured to transmit a first power supply voltage at a first power supply terminal VDD to a second node N2 under control of a voltage at the first node; a first sensing sub-circuit, configured to maintain a voltage at the second node to be at a fixed level under control of the first control terminal; a second sensing sub-circuit, configured to transmit the voltage at the second node to a first sensing signal terminal under control of a second control terminal, so that the first sensing signal terminal senses a voltage associated with a threshold voltage of the driving sub-circuit.

Abstract: The present disclosure provides a gate driving circuit and a driving method thereof as well as a display device. The gate driving circuit comprises a driving circuit connected to a gate line for outputting a gate scanning signal; and a detecting circuit connected to the gate line for collecting and recording the gate scanning signal.

Abstract: A display substrate, a method for manufacturing the same and a display device are provided. The display substrate includes a base substrate, first electrodes above the base substrate, and a light emitting layer disposed at a side of the first electrodes distal from the base substrate, the display substrate further includes signal lines extending in a first direction and fuse wires extending in a second direction, each fuse wire has a fusing point higher than that of the light emitting layer, the fuse wires are located at a side of the light emitting layer proximal to the base substrate and in contact with the light emitting layer, each fuse wire is electrically coupled to at least two signal lines, and an orthographic projection of at least one first electrode on the base substrate is located between orthographic projections of the at least two signal lines on the base substrate.

Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes a plurality of pixel units arranged in an array, each pixel unit includes a first sub-pixel, a second sub-pixel and a third sub-pixel, and each of the first, second and third sub-pixels includes a pixel circuit including a switching transistor, a driving transistor, a sensing transistor, a storage capacitor and a light-emitting device. The first sub-pixels, the second sub-pixels and the third sub-pixels included in each row of the array are controlled by four scanning lines, and at least one of the four scanning lines is shared by the row of the array and another row of the array adjacent to the row of the array. Each column of pixel units of the array are coupled to a same data line.

Abstract: A circuit includes an input sub-circuit configured to transmit an input signal from an input signal terminal to a feedback node under control of a first clock signal from a first clock signal terminal; a pull-up node control sub-circuit configured to transmit a feedback signal of the feedback node to a pull-up node under control of a first clock signal from the first clock signal terminal; a feedback sub-circuit configured to transmit a first voltage signal from a first voltage signal terminal to the feedback node under control of the pull-up node; an output sub-circuit configured to transmit a second clock signal from a second clock signal terminal to an output signal terminal under control of the pull-up node; and a pull-down sub-circuit configured to transmit a second voltage signal from a second voltage signal terminal to the output signal terminal under control of a pull-down node.

Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a light emitting unit; a drive transistor configured to drive the light emitting unit to emit light to display an image frame; and a control circuit configured to control the drive transistor according to signals on control lines. The method of controlling includes: resetting, in a reset stage of an image frame, a voltage of the first electrode of the drive transistor by applying a reset voltage, and sensing, in a sense stage, a threshold voltage of the drive transistor by applying a reference voltage. The control circuit is further configured to control, in an offset elimination stage at the beginning of the image frame and prior to the reset stage, the drive transistor to be switched off, which was in an ON state at the end of a previous image frame.

Abstract: The present disclosure discloses a shift register and a driving method thereof, a gate driving circuit, an array substrate, and a display device. With a signal control circuit, a branch control circuit, a cascade signal output circuit and at least two scanning signal output circuits, each shift register can output at least two different scanning signals to correspond to different gate lines in an array substrate. This can reduce the number of shift registers in a gate drive circuit and the space occupied by the gate drive circuit and can achieve an ultra-narrow bezel design, as compared with an existing shift register that can only output one scan signal. Furthermore, as signals of different output control node do not influence each other, the stability of waveforms of the output scanning signals may also be improved, and a difference in the waveforms of the scanning signals is avoided.

Abstract: The embodiments of the present disclosure propose a shift register and a method for driving the same, a gate driving circuit, and a display apparatus. The shift register includes: a scanning circuit configured to generate a first signal for causing a gate driving signal output by the shift register to have a row shift portion during a scanning period; a sensing circuit configured to generate a second signal for causing the gate driving signal to have a frame shift portion during a blanking period; and a random shift circuit electrically coupled to the scanning circuit and the sensing circuit respectively, and configured to generate the gate driving signal having the row shift portion and randomly having the frame shift portion based on the first signal and the second signal.

Abstract: A shift register circuit, a gate driving circuit and a method for driving the same, and a display apparatus are disclosed.

Abstract: A shift register of the present disclosure includes: an input sub-circuit configured to transmit an input signal from an input signal terminal to a feedback node under the control of a first clock signal terminal; a pull-up control sub-circuit configured to transmit a feedback signal of the feedback node to a pull-up node under the control of the first clock signal terminal; a feedback sub-circuit configured to transmit a first voltage signal from a first voltage signal terminal to the feedback node under the control of the pull-up node; an output sub-circuit configured to transmit a second clock signal from a second clock signal terminal to the output signal terminal under the control of the pull-up node; and a pull-down circuit configured to transmit a second voltage signal from a second voltage signal terminal to the output signal terminal under the control of the first clock signal terminal.

Abstract: The present disclosure provides a gate driving circuit and a driving method, and a display device. The gate driving circuit includes: a plurality of first gate driving units, ith first gate driving unit being configured to output a first gate driving signal to ith row of gate line in a display phase; a plurality of first control modules, mth first control module being configured to control mth second gate driving unit to output a second gate driving signal to mth row of gate line in a vertical blanking phase; nth first control module being configured to control nth second gate driving unit not to output the second gate driving signal in the vertical blanking phase; a plurality of second control modules, kth second control module being configured to control kth second gate driving unit not to output the second gate driving signal in the vertical blanking phase.

Abstract: The present disclosure discloses a pixel circuit, a display apparatus and a dual-gate driving transistor. The pixel circuit comprises a dual-gate driving transistor having a drain electrically connected to a first power supply terminal; a threshold voltage compensation unit electrically connected to a data terminal, a first control terminal, a first gate of the dual-gate driving transistor, and a source of the dual-gate driving transistor respectively; a mobility compensation unit electrically connected to a sensing signal terminal, a second control terminal, and the source of the dual-gate driving transistor respectively; and a light emitting control unit electrically connected to the data terminal, a third control terminal, a second gate of the dual-gate driving transistor, the source of the dual-gate driving transistor, and a light emitting device respectively.

Abstract: The present disclosure discloses a gate drive output stage circuit, a gate driving unit, and a drive method. The gate drive output stage circuit includes: a first control sub-circuit configured to transmit a start signal of a compensation driving terminal to a first node; a second control sub-circuit configured to transmit a first clock signal of a first clock terminal to a control node when the first node is at an effective level; a first output sub-circuit configured to transmit a second clock signal of a second clock terminal to a first output terminal when the control node is at an effective level; and a second output sub-circuit configured to transmit a first power supply voltage signal of a first power supply voltage terminal to a second output terminal when the control node is at the effective level.