Abstract: A display substrate, manufacturing method thereof, and display device. The display substrate comprises: a substrate, gate line, data line, power connection line and multiple sub-pixels on the substrate, the display substrate has defective points formed by short-circuiting of the gate line and data line, and the gate line forming defective points is a defective gate line; the data line forming defective points is a defective data line; the power connection line is arranged on the same layer as gate electrodes of multiple transistors; the defective gate line and defective power connection line are disconnected, the display substrate further comprises: a repair line disposed on one side, away from the substrate, of the source drain electrode of multiple transistors, the repair line is respectively connected to the partially disconnected defective gate line and partially disconnected defective power connection line, and is used for transmitting scanning signals to repair the display substrate.

Abstract: A pixel unit includes a first sub-pixel circuit and a second sub-pixel circuit. The first sub-pixel circuit includes a first sub-pixel driving circuit and a first light-emitting element, and the second sub-pixel circuit includes a second sub-pixel driving circuit and a second light-emitting element. The first sub-pixel driving circuit and the second sub-pixel driving circuit are connected to a first data line, and the first sub-pixel driving circuit is connected to a first gate line, the second sub-pixel driving circuit is connected to the second gate line. The first sub-pixel driving circuit is configured to drive the first light-emitting element by a data voltage on the first data line under the control of the first gate line. The second sub-pixel driving circuit is configured to drive the second light-emitting element by the data voltage on the first data line under the control of the second gate line.

Abstract: The present disclosure discloses a shift register and a driving method therefor, a gate drive circuit, and a display device. An input circuit is configured to respond to a signal of an input signal end and provide a signal of a first reference signal terminal to a first node; a reset circuit is configured to respond to the signal of the second node and provide a signal of a second reference signal end to the first node; and an output circuit is configured to respond to the signal of the first node and provide the signal of the clock signal end to an output signal end and is configured to respond to the signal of the third node and provide the signal of the second reference signal end to the output signal end.

Abstract: A display panel, a display device, and a driving method of the display panel are provided. The display panel includes a plurality of pixel units arranged in an array and data lines and sensing lines connected to the pixel units, and each of the plurality of pixel units includes a plurality of sub-pixels; all sub-pixels in a same column of pixel units are connected to a same data line, each column of pixel units is respectively connected to two of the sensing lines, and any two adjacent columns of pixel units share one of the sensing line.

Abstract: The present disclosure provides a driving unit, a driving method thereof, a gate driving circuit, and a display substrate. The driving unit includes: a shift register including a pull-up node, a pull-down node and a driving signal output terminal; and a first output circuit including a first control sub-circuit, a second control sub-circuit, an output sub-circuit, and a first signal output terminal; the first control sub-circuit and the output sub-circuit are coupled at a first node, and the first control sub-circuit, the second control sub-circuit and the output sub-circuit are coupled at a second node.

Abstract: The present disclosure discloses a shift register, a driving method thereof, a gate drive circuit, an array substrate and a display device. With a signal control circuit, a branch control circuit, a cascade signal output circuit and at least two scan signal output circuits, each shift register can output at least two scan signals to correspond to different gate lines in a display panel. This can reduce the number of shift registers in a gate drive circuit and the space occupied by the gate drive circuit and can achieve an ultra-narrow frame design, as compared with an existing shift register that can only output one scan signal. Moreover, as signals of different output control node do not influence each other, the output stability can also be improved.

Abstract: A transparent OLED display panel, a manufacturing method therefor, and a display apparatus, relate to the field of display technologies. The transparent OLED display panel has a plurality of transparent regions (a) and a plurality of display regions (b), wherein the transparent regions and the display regions are alternately arranged (a) in a first direction. The transparent OLED display panel includes a plurality of pixels (1) arranged in a second direction and a plurality of data lines (31, 32) extending along the first direction; each of the pixels (1) includes a plurality of sub-pixels (11), and the sub-pixels (11) in each display region (b) include a row of first sub-pixels (111) and a row of second sub-pixels (112) both arranged in the second direction; and the pixel at least includes one first sub-pixel (111) and one second sub-pixel (112) adjacent to each other in the first direction.

Abstract: A method for controlling a charging time of a display panel includes: during t0+k?t in a (k+1)-th blanking time, writing a data voltage to a gate of a driving transistor, and detecting a voltage Vk_(j,i) of a second electrode of the driving transistor; during a t0+(k+r)?t in a (k+1+r)-th blanking time, writing the data voltage to the gate of the driving transistor, and detecting a voltage Vk+1_(j,i) of the second electrode of the driving transistor; determining whether ?Vj,i=Vk+1_ji?Vk_ji is less than or equal to a target voltage difference VT; if ?Vj,i?VT, taking the T=t0+k?t as an expected charging time of a sub-pixel; if ?Vj,i>VT, cyclically performing the charging step described above to obtain ?Vj,i=Vk+p+1_(j,i)?Vk+p_(j,i), and comparing ?Vj,i with the target voltage difference VT, until ?Vj,i?VT, taking t0+(k+p+r?1)?t as the expected charging time of the sub-pixel. p is taken from 1, and increases by 1 for each cycle.

Abstract: Embodiments of the present disclosure provide an array substrate, a display device. The array substrate comprises first power lines and second power lines disposed on a substrate, wherein the first power line crosses the second power line to define a pixel region, wherein the first power lines crosses the second power lines at intersection points, and the intersection points include a first intersection point where the first power line is electrically connected to the second power line and a second intersection point where the first power line is insulated from the second power line are insulated; the first intersection points for each of the first power supply lines and/or the first intersection points for each of the second power supply lines are distributed at intervals.

Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-unit and a leakage prevention circuit; the first sub-unit includes a first input circuit and a first output circuit. The first input circuit controls a level of a first node in response to a first input signal, the first output circuit provides an output signal at an output terminal under control of the level of the first node, the leakage prevention circuit is connected to the first node and a first voltage terminal, and controls a level of a leakage prevention node under control of the level of the first node, whereby a conductive path is formed between the leakage prevention node and the first voltage terminal, and a circuit connected between the first node and the leakage prevention node is turned off.

Abstract: The present disclosure provides a display panel and a driving method thereof, and a display apparatus. The display panel includes: a plurality of sub-pixels arranged in an array, a plurality of data lines, and a plurality of compensation detection lines, wherein each data line is coupled with sub-pixels in one column; sub-pixels in every three columns serve as one first sub-pixel group, and each first sub-pixel group corresponds to two compensation detection lines which include a first detection line and a second detection line; and in each first sub-pixel group, sub-pixels in the first column are coupled with the first detection line, sub-pixels in the third column are coupled with the second detection line, and sub-pixels in the second column are alternatively coupled with the first detection line and the second detection line.

Abstract: An organic light-emitting diode array substrate and manufacturing method thereof, and display apparatus are provided. The organic light-emitting diode array substrate includes: a base substrate; a first metal layer disposed on the base substrate; a first insulating layer disposed on a side of the first metal layer far away from the base substrate; a second metal layer disposed on a side of the first insulating layer far away from the base substrate; the first metal layer includes a first power line, and the second metal layer includes a second power line; the second power line is connected in parallel with the first power line through a first via hole which penetrates the first insulating layer.

Abstract: The embodiments of the present disclosure provide a shift register and a driving method thereof, a gate driving circuit, and a display device. The shift register includes a compensation selection circuit, a storage circuit, a blanking input circuit, and a shift register circuit. The compensation selection circuit is configured to provide an input signal to a first node. The storage circuit is configured to store and maintain a voltage difference between a blanking control signal terminal and the first node. The blanking input circuit is configured to provide a blanking input signal to a second node. The shift register circuit is configured to provide a compensation driving signal during a blanking period, and provide a scan driving signal during a display period.

Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device. The shift register unit includes: an input circuit, a first capacitor circuit, an output circuit, an output pull-down circuit, a coupling circuit, and an inverter circuit. The inverter circuit is coupled to an input control terminal, a first node, a second node, and a first level signal input terminal, and a second level signal input terminal; and used to control to connect or disconnect the second node and the first level signal input under the control of the input control terminal and the first level signal input terminal; also used to control to connect or disconnect the second node and the second level signal input terminal under the control of the first node and the second level signal input terminal.

Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, and a GOA circuit, a source electrode IC and PLG wires arranged on the base substrate, and the PLG wires connect the GOA circuit with the source electrode IC. The GOA circuit transmits a GOA signal, and the GOA signal comprises a cascade signal and a non-cascade signal. The PLG wires comprise a first PLG wire group and at least one second PLG wire group, the first PLG wire group transmits the cascade signal, the second PLG wire group transmits the non-cascade signal, a line width of the first PLG wire group is smaller than that of the second PLG wire group, and the first PLG wire group is located at a side of the second PLG wire group distal to an active area of the base substrate.

Abstract: An electronic panel, a display device, and a driving method are disclosed. In the electronic panel, each sub-pixel unit includes a light emitting unit, a pixel driving circuit for driving the light emitting unit to emit light, and a sensing circuit for sensing the pixel driving circuit; the gate driving circuit includes N+1 output terminals, and is configured to output gate scanning signals that turn on the N rows of the plurality of sub-pixel units row by row; the pixel driving circuits of the sub-pixel units in a j-th row are connected to a j-th output terminal of the gate driving circuit to receive the gate scanning signal as a scanning driving signal, and the sensing circuits of the sub-pixel units in the j-th row are connected to a (j+1)-th output terminal of the gate driving circuit to receive the gate scanning signal as a sensing driving signal.

Abstract: The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.

Abstract: A pixel circuit and a driving method thereof, and a display device, the pixel circuit being configured to drive a light-emitting element and including: a node control sub-circuit, which is configured to provide a first node with a signal of a data signal end and provide a second node with a signal of a control signal end under the control of a first scanning end; a driving sub-circuit, which is configured to provide the second node with a driving current under the control of the first node and the second node; a storage sub-circuit, which is configured to store electric charge between the first node and the second node; a reading sub-circuit, and the light-emitting element, which is electrically connected to the second node and a second power supply end, respectively.

Abstract: A display substrate and a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array. At least one sub-pixel includes a first transistor, a second transistor, a third transistor and a storage capacitor. The first electrode of the third transistor is electrically connected to an active layer of the third transistor through a first via hole, and the first electrode of the third transistor is configured to be electrically connected to the light emitting element through a second via hole; the first via hole and the second via hole are at least partially overlapped with each other in a direction perpendicular to the base substrate.

Abstract: A scan driving circuit, a driving method, and a display device is provided. The scan driving circuit includes a first scan unit, a first scan line, a first control circuit, and a first switching circuit. The first scan unit includes a first output terminal configured to output a first scan signal. The first control circuit is connected to the first switching circuit, and the first control circuit is configured to control turn-on or turn-off of the first switching circuit under control of the first control signal. The first scan line is connected to the first output terminal through the first switching circuit, so that the first output terminal is electrically connected to the first scan line when the first switching circuit is turned on.