Patents by Inventor Cem Basceri

Cem Basceri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DEVICES, SYSTEMS, AND METHODS RELATED TO REMOVING PARASITIC CONDUCTION IN SEMICONDUCTOR DEVICES
    Publication number: 20150318388
    Abstract: Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate. The method further includes attaching the stack of semiconductor materials to a carrier, where the carrier is configured to provide a signal path to the heterojunction. The method also includes exposing the bulk region by removing the epitaxial substrate.
    Type: Application
    Filed: July 10, 2015
    Publication date: November 5, 2015
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri, Thomas Gehrke
  • Semiconductor devices having compact footprints
    Patent number: 9105701
    Abstract: Semiconductor devices and methods for making semiconductor devices are disclosed herein. A semiconductor device configured in accordance with a particular embodiment includes a substrate having a source/drain region, an interconnect, and first and second electrodes extending between first and second sides of the substrate. The first electrode includes a first contact pad and a via extending through the substrate that connects the first contact pad with the interconnect. The second electrode includes a second contact pad and a conductive feature in the substrate that connects the second contact pad with the interconnect.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: August 11, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri
  • Micropipe-free silicon carbide and related method of manufacture
    Patent number: 9099377
    Abstract: Micropipe-free, single crystal, silicon carbide (SiC) and related methods of manufacture are disclosed. The SiC is grown by placing a source material and seed material on a seed holder in a reaction crucible of the sublimation system, wherein constituent components of the sublimation system including the source material, reaction crucible, and seed holder are substantially free from unintentional impurities. By controlling growth temperature, growth pressure, SiC sublimation flux and composition, and a temperature gradient between the source material and the seed material or the SiC crystal growing on the seed material during the PVT process, micropipe-inducing process instabilities are eliminated and micropipe-free SiC crystal is grown on the seed material.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: August 4, 2015
    Assignee: Cree, Inc.
    Inventors: Cem Basceri, Yuri Khlebnikov, Igor Khlebnikov, Cengiz Balkas, Murat N. Silan, Hudson McD. Hobgood, Calvin H. Carter, Jr., Vijay Balakrishna, Robert T. Leonard, Adrian R. Powell, Valeri T. Tsvetkov, Jason R. Jenny
  • Devices, systems, and methods related to removing parasitic conduction in semiconductor devices
    Patent number: 9082748
    Abstract: Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate. The method further includes attaching the stack of semiconductor materials to a carrier, where the carrier is configured to provide a signal path to the heterojunction. The method also includes exposing the bulk region by removing the epitaxial substrate.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: July 14, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri, Thomas Gehrke
  • LIGHT EMITTING DEVICES WITH BUILT-IN CHROMATICITY CONVERSION AND METHODS OF MANUFACTURING
    Publication number: 20150004729
    Abstract: Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device.
    Type: Application
    Filed: September 17, 2014
    Publication date: January 1, 2015
    Inventors: Cem Basceri, Thomas Gehrke, Charles M. Watkins
  • SEMICONDUCTOR DEVICES HAVING COMPACT FOOTPRINTS AND RELATED DEVICES, SYSTEMS, AND METHODS
    Publication number: 20140361382
    Abstract: Semiconductor devices and methods for making semiconductor devices are disclosed herein. A semiconductor device configured in accordance with a particular embodiment includes a substrate having a source/drain region, an interconnect, and first and second electrodes extending between first and second sides of the substrate. The first electrode includes a first contact pad and a via extending through the substrate that connects the first contact pad with the interconnect. The second electrode includes a second contact pad and a conductive feature in the substrate that connects the second contact pad with the interconnect.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 11, 2014
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri
  • Light emitting devices with built-in chromaticity conversion and methods of manufacturing
    Patent number: 8847198
    Abstract: Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: September 30, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Thomas Gehrke, Charles M. Watkins
  • SOLID STATE LIGHTING DEVICES WITH REDUCED CRYSTAL LATTICE DISLOCATIONS AND ASSOCIATED METHODS OF MANUFACTURING
    Publication number: 20140246683
    Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.
    Type: Application
    Filed: May 13, 2014
    Publication date: September 4, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Cem Basceri, Thomas Gehrke
  • METHODS, DEVICES, AND SYSTEMS RELATED TO FORMING SEMICONDUCTOR POWER DEVICES WITH A HANDLE SUBSTRATE
    Publication number: 20140239348
    Abstract: Methods of manufacturing device assemblies, as well as associated semiconductor assemblies, devices, systems are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a semiconductor device assembly that includes a handle substrate, a semiconductor structure having a first side and a second side opposite the first side, and an intermediary material between the semiconductor structure and the handle substrate. The method also includes removing material from the semiconductor structure to form an opening extending from the first side of the semiconductor structure to at least the intermediary material at the second side of the semiconductor structure. The method further includes removing at least a portion of the intermediary material through the opening in the semiconductor structure to undercut the second side of the semiconductor structure.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri
  • One-transistor composite-gate memory
    Patent number: 8786005
    Abstract: One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: July 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Gurtej S. Sandhu
  • METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS
    Publication number: 20140151857
    Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 5, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Donald L. Westmoreland
  • Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing
    Patent number: 8728840
    Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: May 20, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Thomas Gehrke
  • DEVICES, SYSTEMS, AND METHODS RELATED TO REMOVING PARASITIC CONDUCTION IN SEMICONDUCTOR DEVICES
    Publication number: 20140097441
    Abstract: Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate. The method further includes attaching the stack of semiconductor materials to a carrier, where the carrier is configured to provide a signal path to the heterojunction. The method also includes exposing the bulk region by removing the epitaxial substrate.
    Type: Application
    Filed: October 5, 2012
    Publication date: April 10, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri, Thomas Gehrke
  • Method and system for binding halide-based contaminants
    Patent number: 8691015
    Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: April 8, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Donald L. Westmoreland
  • Silicon carbide dimpled substrate
    Patent number: 8664664
    Abstract: A dimpled substrate and method of making including a substrate of high thermal conductivity having a first main surface and a second main surface opposite the first main surface. Active epitaxial layers are formed on the first main surface of the substrate. Dimples are formed as extending from the second main surface into the substrate toward the first main surface. An electrical contact of low resistance material is disposed on the second main surface and within the dimples. A back contact of low resistance and low loss is thus provided while maintaining the substrate as an effective heat sink.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: March 4, 2014
    Assignee: Cree, Inc.
    Inventors: Christopher Harris, Cem Basceri, Thomas Gehrke, Cengiz Balkas
  • METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS
    Publication number: 20130231240
    Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
    Type: Application
    Filed: April 8, 2013
    Publication date: September 5, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Donald L. Westmoreland
  • Methods and systems for controlling temperature during microfeature workpiece processing, E.G., CVD deposition
    Patent number: 8518184
    Abstract: The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: August 27, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Kevin L. Beaman, Trung T. Doan, Lyle D. Breiner, Ronald A. Weimer, Er-Xuan Ping, David J. Kubista, Cem Basceri, Lingyi A. Zheng
  • Method and system for binding halide-based contaminants
    Patent number: 8435886
    Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: May 7, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Donald L. Westmoreland
  • Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
    Patent number: 8409933
    Abstract: The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of forming a conductive contact to a source/drain region of a field effect transistor includes providing gate dielectric material intermediate a transistor gate and a channel region of a field effect transistor. At least some of the gate dielectric material extends to be received over at least one source/drain region of the field effect transistor. The gate dielectric material received over the one source/drain region is exposed to conditions effective to change it from being electrically insulative to being electrically conductive and in conductive contact with the one source/drain region. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: April 2, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Gurtej S. Sandhu, H. Montgomery Manning
  • Micropipe-free silicon carbide and related method of manufacture
    Patent number: 8410488
    Abstract: Micropipe-free, single crystal, silicon carbide (SiC) and related methods of manufacture are disclosed. The SiC is grown by placing a source material and seed material on a seed holder in a reaction crucible of the sublimation system, wherein constituent components of the sublimation system including the source material, reaction crucible, and seed holder are substantially free from unintentional impurities. By controlling growth temperature, growth pressure, SiC sublimation flux and composition, and a temperature gradient between the source material and the seed material or the SiC crystal growing on the seed material during the PVT process, micropipe-inducing process instabilities are eliminated and micropipe-free SiC crystal is grown on the seed material.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: April 2, 2013
    Assignee: Cree, Inc.
    Inventors: Cem Basceri, Yuri Khlebnikov, Igor Khlebnikov, Cengiz Balkas, Murat N. Silan, Hudson McD. Hobgood, Calvin H. Carter, Jr., Vijay Balakrishna, Robert T. Leonard, Adrian R. Powell, Valeri T. Tsvetkov, Jason R. Jenny