Patents by Inventor Chan Han

Chan Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7485594
    Abstract: A porous mullite composition is made by forming a mixture of one or more precursor compounds having the elements present in mullite (e.g., clay, alumina, silica) and a property enhancing compound. The property enhancing compound is a compound having an element selected from the group consisting of Mg, Ca, Fe, Na, K, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, B, Y, Sc, La and combination thereof. The mixture is shaped and to form a porous green shape which is heated under an atmosphere having a fluorine containing gas to a temperature sufficient to form a mullite composition comprised substantially of acicular mullite grains that are essentially chemically bound.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: February 3, 2009
    Assignee: Dow Global Technologies, Inc.
    Inventors: Chandan Saha, Sharon Allen, Chan Han, Robert T. Nilsson, Arthur R. Prunier, Jr., Aleksander J. Pyzik, Sten A. Wallin, Robin Ziebarth, Timothy J. Gallagher
  • Publication number: 20090014503
    Abstract: There are provided reflow apparatuses and a methods therefor. In some embodiments, a reflow apparatus includes a first heating unit capable of heating a solder on a substrate up to just below before a melting point of the solder at ambient pressure such that the solder on the substrate is melted and electronic components mounted on the substrate are then soldered to the substrate; and a second heating unit connected to the first heating unit, the second heating unit capable of heating the solder on the substrate heated in the first heating unit through at least a portion of a solder melting temperature range in a vacuum state.
    Type: Application
    Filed: July 9, 2008
    Publication date: January 15, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hoon Choi, Seong-Chan Han, Se-Hyung Ryu, Nam-Yong Oh
  • Patent number: 7473369
    Abstract: A method for removing dissolved contaminants from solution using a surface-activated crystalline titanium oxide product having a high adsorptive capacity and a high rate of adsorption with respect to dissolved contaminants, in particular, arsenate and arsenite. Preferably, the titanium oxide product includes crystalline anatase having primary crystallite diameters in the range of 1-30 nm. The surface-activated titanium oxide is combined with other filter media to further improve the removal of dissolved contaminants.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: January 6, 2009
    Assignee: The Trustees of the Stevens Institute of Technology
    Inventors: Xiaoguang Meng, Mazakhir Dadachov, George P. Korfiatis, Christos Christodoulatos, David J. Moll, Geofrey Paul Onifer, Daniel B. Rice, Robert E. Reim, Fredrick W. Vance, Harlan Robert Goltz, Chan Han, William I. Harris
  • Publication number: 20080181423
    Abstract: An improved monaural and stereophonic headset is provided that allows subscribers to safely stow away an unused earpiece. The headset includes a connector that is constructed in a manner such that it is capable of directly interfacing with and retaining an ear plug. In another aspect of the invention, an ear plug is provided that is adapted to be received by the connector in the monaural and stereophonic headset.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 31, 2008
    Inventors: Martias Duarte, Harout Mkhitarian, Chan Hans Liu, Mun Gwen Chong
  • Publication number: 20080164054
    Abstract: Example embodiments of the present invention include a printed circuit board (PCB) capable of controlling the size and position of voids during a surface mounting process. To this end, the PCB includes: an insulating plate made of an insulating material; printed circuit patterns formed on the insulating plate; a plurality of lands to support a plurality of solder joints, each land coupled to one end of each of the printed circuit patterns; and anti-wetting layers mounted on a surface of each of the lands for solder joint therein. The anti-wetting layers allow a void produced during a surface mounting process to move to a central surface on a pad, so that the solder joint reliability between the solder ball and the land is increased. As a result, the reliability of a semiconductor device is enhanced.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 10, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-Woo SHIN, Dong-Chun LEE, Seong-Chan HAN, Hyo-Jae BANG, Si-Suk KIM, Su-Jin JUNG
  • Publication number: 20080136580
    Abstract: Provided are a chip network resistor contacting a printed circuit board (PCB) through solder balls and a semiconductor module having the chip network resistor. The chip network resistor includes: a body formed of an insulating material; a resistor formed on the body; external electrodes connected to the resistor and disposed on a lower surface of the body so as to have solder ball pad shapes; and conductive balls adhered on the external electrodes.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 12, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jae BANG, Dong-Chun LEE, Seong-Chan HAN, Jung-Hyeon KIM, Hyun-Seok CHOI
  • Publication number: 20080130254
    Abstract: An electronic device with a reworkable electronic component, a method of manufacturing the electronic device, and a method of reworking the electronic component are disclosed. The electronic device includes a first cavity provided in a board body. A first metal pattern is provided on the board body and adjacent to the first cavity. A first electronic component is provided in the first cavity. A first connection pattern is provided adjacent to an upper edge portion of the first electronic component and extends to the first metal pattern so that the first metal pattern is electrically connected to the first electronic component.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 5, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong-Chan HAN, Dong-Woo SHIN, Young-Soo LEE, Hyo-Jae BANG, Hun HAN
  • Publication number: 20080123909
    Abstract: A method of transforming minutiae using the Taylor series for interoperable fingerprint recognition between disparate fingerprint sensors, which parses the fields of a Standard Interchange Format (SIF) template having the level of minutiae proposed in SC37, extract information fields corresponding to resolution, image size, and minutiae, corrects the locations of minutiae constituting the template, and standardizes the minutiae, thus increasing a recognition rate for fingerprint matching, and which applies transformation parameters using the Taylor series to a golden template that is generated using a plurality of samples for the same fingerprint which are input from a plurality of disparate fingerprint recognition sensors, thus improving recognition performance and reliability of matching between the disparate sensors that use the transformation of minutiae merely by correcting the locations of the minutiae, without correcting resolution or distortion characteristics.
    Type: Application
    Filed: May 4, 2007
    Publication date: May 29, 2008
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Hak Il Kim, Young Chan Han, Ji Hyeon Jang
  • Publication number: 20080116546
    Abstract: A lead frame unit, a semiconductor package having a lead frame unit, a stacked semiconductor package having a semiconductor package, and methods of manufacturing the same are provided. The lead frame unit in a stacked semiconductor package may include a die pad supporting a semiconductor chip, an inner lead electrically connected to the semiconductor chip, an outer lead extending from the inner lead, and a heat-resistant insulation member surrounding the connection portion. The outer lead may include a connection portion connected to the inner lead and a junction portion connected to the connection portion and a circuit board. An external signal may be applied to the junction portion. If the lead frame unit is used in the stacked semiconductor package, the outer lead and a dummy outer lead in the stacked semiconductor package may have substantially the same shape.
    Type: Application
    Filed: November 21, 2007
    Publication date: May 22, 2008
    Inventors: Hyo-Jae Bang, Heui-Seog Kim, Seong-Chan Han, Jung-Hyeon Kim, Sung-Hwan Kim
  • Publication number: 20080111235
    Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 15, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jae Bang, Heui-Seog Kim, Dong-Chun Lee, Seong-Chan Han, Jung-Hyeon Kim
  • Publication number: 20080079128
    Abstract: A lead frame type stack package in which a lead of the package is well connected to a semiconductor module, and a method of fabricating the same are provided. A lead of an upper package and a lead of a lower package are connected using laser soldering. Since leads of the upper and lower packages are connected by solder balls without the use of a soldering pot, loss of a plating layer of the lead due to solder dipping is prevented and the leads are well connected without soldering defects when connecting the lead of the lower package to a connection pad of a semiconductor module substrate.
    Type: Application
    Filed: September 14, 2007
    Publication date: April 3, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo-Jae BANG, Seong-Chan HAN, Hun HAN, Dong-Chun LEE
  • Publication number: 20080079118
    Abstract: A reworkable passive element embedded printed circuit board (PCB) including a board member, first and second fillings, and a first passive element. The board member has first and second through holes which are spaced apart from each other. The first and second fillings are buried in the first and second through holes, respectively, and formed of a reflowable conductive material. The first passive element includes first and second electrodes. A first insertion groove is formed in a portion of a surface of the board member between the first and second through holes and portions of the first and second fillings. The first passive element is mounted on the first insertion groove. The first electrode includes a bottom surface and a side contacting the first filling and an exposed upper surface. The second electrode comprises a bottom surface and a side contacting the second filling and an exposed upper surface.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 3, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo-jae BANG, Dong-chun Lee, Seong-chan Han, Jun-young Lee, Jung-hyeon Kim
  • Publication number: 20080042279
    Abstract: A mounting structure of a semiconductor device and a method of mounting the semiconductor device are provided. The mounting structure includes a circuit substrate having a terminal pad. A device substrate is located over the circuit substrate having a ball pad facing the terminal pad of the circuit substrate. A conductive ball is formed between the circuit substrate and the device substrate in order to connect the terminal pad of the circuit substrate to the ball pad of the device substrate. A first soldering flux including an epoxy-based resin connects the conductive ball to the ball pad of the device substrate. An underfill layer is formed between the circuit substrate and the device substrate in order to bury the conductive ball and the first soldering flux.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo-Jae BANG, Wha-Su SIN, Sung-Yeol LEE, Yung-Hyun KIM, Seong-Chan HAN, Jung-Hyeon KIM
  • Publication number: 20080044951
    Abstract: A semiconductor package may include a substrate having external contact terminals. A semiconductor chip having bonding pads may be formed on the substrate. Conductive bumps may connect the external contact terminals of the substrate to the bonding pads of the semiconductor chip. An underfill may be interposed between the substrate and the semiconductor chip. The underfill may include a first underfill region composed of a first material adjacent to the semiconductor chip and a second underfill region composed of a second material adjacent to the substrate, the first material having a higher glass transition temperature than the second material.
    Type: Application
    Filed: June 15, 2007
    Publication date: February 21, 2008
    Inventors: Hyo-jae Bang, Dong-chun Lee, Seong-chan Han, Chang-yong Park, Hun Han
  • Publication number: 20080023812
    Abstract: Example embodiments relate to a semiconductor package. The semiconductor package may include a mounting substrate, a semiconductor chip mounted to the mounting substrate, at least one passive component passing therethrough and mounted to the mounting substrate, and a cover covering the mounting substrate, the semiconductor chip and the at least one passive component.
    Type: Application
    Filed: July 20, 2007
    Publication date: January 31, 2008
    Inventors: Hyo-jae Bang, Dong-chun Lee, Seong-chan Han, Kyung-du Kim, Sun-kyu Hwang
  • Publication number: 20070243378
    Abstract: A polyethylene terephthalate monofilament obtained by spinning a polyethylene terephthalate chip having an intrinsic viscosity of 0.8 to 1.3, which gives a stress-strain curve exhibiting an elongation of less than 2.5% at an initial stress of 2.0 g/d, with an initial modulus value of 80 to 160 g/d, an elongation of 7.5% or less in a stress range of from 2.0 g/d to 9.0 g/d, and an elongation of at least 2.0% or more in a stress range of from 10.0 g/d to the point of break, is provided.
    Type: Application
    Filed: May 15, 2006
    Publication date: October 18, 2007
    Applicant: HYOSUNG Corporation
    Inventors: Dae-Hwan Cho, Kyu-Chan Han, Dong-Seok Shim
  • Publication number: 20070230751
    Abstract: A method of correcting distortion caused by fingerprint input sensors of heterogeneous fingerprint recognition systems. The method includes a first step of fabricating a measurement pattern for measuring resolutions of a fingerprint input sensor, a second step of measuring image resolutions of an image, acquired by the fingerprint input sensor, using the fabricated measurement pattern for predetermined locations and directions, a third step of designing control lines for compensating for the distortion caused by the fingerprint input sensor, based on the measured resolutions, a fourth step of obtaining average horizontal and vertical resolutions of the acquired image, a fifth step of modeling the control lines based on a ratio of the average horizontal resolution to the vertical average resolution, and a sixth step of compensating for the distortion of the acquired image based on results of the modeling.
    Type: Application
    Filed: December 14, 2006
    Publication date: October 4, 2007
    Inventors: Hak Il Kim, Young Chan Han
  • Publication number: 20070213207
    Abstract: A porous mullite composition is made by forming a mixture of one or more precursor compounds having the elements present in mullite (e.g., clay, alumina, silica) and a property enhancing compound. The property enhancing compound is a compound having an element selected from the group consisting of Mg, Ca, Fe, Na, K, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, B, Y, Sc, La and combination thereof. The mixture is shaped and to form a porous green shape which is heated under an atmosphere having a fluorine containing gas to a temperature sufficient to form a mullite composition comprised substantially of acicular mullite grains that are essentially chemically bound.
    Type: Application
    Filed: May 1, 2007
    Publication date: September 13, 2007
    Inventors: Chandan Saha, Sharon Allen, Chan Han, Robert Nilsson, Arthur Prunier, Aleksander Pyzik, Sten Wallin, Robin Ziebarth, Timothy Gallagher
  • Patent number: D566687
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: April 15, 2008
    Assignee: Helio, LLC
    Inventors: Matias Duarte, Harout Mkhitarian, Chan Hans Liu, Mun Gwen Chong
  • Patent number: D570823
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: June 10, 2008
    Assignee: Helio, LLC
    Inventors: Matias Duarte, Harout Mkhitarian, Chan Hans Liu, Mun Gwen Chong