Patents by Inventor Chan-Long Shieh

Chan-Long Shieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Top emitting VCSEL with implant
    Patent number: 5256596
    Abstract: VCSELs including a central active layer with upper and lower mirror stacks wherein a circular trench is formed in one mirror stack to define a lasing area. The trench reduces reflectivity to prevent lasing outside the operating area and a deep beryllium implant in either of the mirror stacks, along with the trench, confines current distribution to maximize power output and efficiency. A transparent metal contact is used as a top contact in one embodiment.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: October 26, 1993
    Assignee: Motorola, Inc.
    Inventors: Donald E. Ackley, Chan-Long Shieh
  • Method for fabricating index-guided semiconductor laser
    Patent number: 4990466
    Abstract: A method of altering a refractive index, as for an optical waveguide, as in a buried heterostructure laser, by inducing disordering in a region of a semiconducotr body comprises exposing a surface portion of the semiconductor body to plasma etching, coating at least a part of the surface portion with an oxide layer, heat treating the semiconductor body.
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: February 5, 1991
    Assignee: Siemens Corporate Research, Inc.
    Inventors: Chan-Long Shieh, Joseph I. Mantz, Reinhard W. H. Engelmann
  • Method of making I.sup.2 L heterostructure bipolar transistors
    Patent number: 4745085
    Abstract: A process of making an integrated injection logic (I.sup.2 L) semiconductor structure is disclosed which is particularly advantageous for implementation in a group III-V compound semiconductor such as gallium arsenide. By use of "regrowth" techniques, the base region of the lateral transistor is made extremely thin (less than one-tenth micron). Utilization of a Schottky collector in a vertical transistor simplifies the structure.
    Type: Grant
    Filed: December 1, 1986
    Date of Patent: May 17, 1988
    Assignee: Siemens Corporate Research & Support, Inc.
    Inventor: Chan-Long Shieh
  • I.sup.2 L heterostructure bipolar transistors and method of making the same
    Patent number: 4644381
    Abstract: An integrated injection logic (I.sup.2 L) semiconductor structure is disclosed which may be advantageously implemented in a group III-V compound semiconductor such as gallium arsenide. The base region of the lateral transistor is made extremely thin (less than one-tenth micron) by use of "regrowth" techniques. The structure of the vertical transistor is simplified by using a Schottky collector.
    Type: Grant
    Filed: April 8, 1985
    Date of Patent: February 17, 1987
    Assignee: Siemens Corporate Research & Support, Inc.
    Inventor: Chan-Long Shieh