Patents by Inventor Chandra Joshi
Chandra Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10868754Abstract: Disclosed herein are enhancements for operating an input/output (I/O) management cluster with end I/O devices. In one implementation, a method of operating an I/O cluster includes, in a first I/O management node of the I/O management cluster, executing a first application to manage data for an I/O device communicatively coupled via at least one switch to the first I/O management node. The method further provides identifying a failure in the first I/O management node related to processing the data for the I/O device and, in response to the failure, configuring the at least one switch to communicate the data for the I/O device with a second I/O management node of the I/O management cluster. The method also includes, in the second I/O management node and after configuring the at least one switch, executing a second application to manage the data for the I/O device.Type: GrantFiled: October 26, 2016Date of Patent: December 15, 2020Assignee: NEBBIOLO TECHNOLOGIES INC.Inventors: Flavio Bonomi, Chandra Joshi, Kannan Devarajan, Pankaj Bhagra, Palani Chinnakannan
-
Publication number: 20180115457Abstract: Disclosed herein are enhancements for operating an input/output (I/O) management cluster with end I/O devices. In one implementation, a method of operating an I/O cluster includes, in a first I/O management node of the I/O management cluster, executing a first application to manage data for an I/O device communicatively coupled via at least one switch to the first I/O management node. The method further provides identifying a failure in the first I/O management node related to processing the data for the I/O device and, in response to the failure, configuring the at least one switch to communicate the data for the I/O device with a second I/O management node of the I/O management cluster. The method also includes, in the second I/O management node and after configuring the at least one switch, executing a second application to manage the data for the I/O device.Type: ApplicationFiled: October 26, 2016Publication date: April 26, 2018Inventors: Flavio Bonomi, Chandra Joshi, Kannan Devarajan, Pankaj Bhagra, Palani Chinnakannan
-
Publication number: 20150113221Abstract: A first processor receives a write request from an input/output (I/O) device connected to the first processor. The first processor determines whether the write request satisfies an allocating write criterion. Responsive to determining that the write request satisfies the allocating write criterion, the first processor writes data associated with the write request to a cache of the first processor.Type: ApplicationFiled: March 15, 2013Publication date: April 23, 2015Inventors: Herbert Hum, Chandra Joshi, Rahul Pal, Luke Chang
-
Publication number: 20050226160Abstract: Multi-PHY addressing from source to destination in which n-number of channels or ports are used in a PHY layer device for communication with a link layer device. A single link layer to a single-PHY layer topology and a single link layer to a multi-PHY layer topology comprising multiple ports or channels receives a plurality of channels groups. Status indication signal is provided on continuous basis for the direct status for up to a predetermined number of channels.Type: ApplicationFiled: June 3, 2005Publication date: October 13, 2005Inventors: Jay Sethuram, Richard Weber, Chandra Joshi
-
Patent number: 6691221Abstract: A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit. The instruction loading circuit loads the L instructions from the second instruction storing circuit into the positions previously occupied by the L instructions dispatched from the first instruction storing circuit.Type: GrantFiled: May 24, 2001Date of Patent: February 10, 2004Assignees: Mips Technologies, Inc., Kabushiki Kaisha ToshibaInventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
-
Patent number: 6650895Abstract: A system and a methodology to improve the end-user quality of service both in terms of response time and reliability for the transport of in-call DTMF signals in wireless systems, particularly in geostationary mobile satellite systems. The methodology encompasses several techniques to provide acceptable end-to-end quality of service for DTMF. A technique is applicable for transport of DTMF in the wireless subscriber to network direction, where DTMF digits are carried in the form of an out-band message. The central part of the technique is to allow multiple key presses in the same message, thereby increasing efficiency and throughput in long-delay environment. Another technique utilizes the vocoder's functionality to carry DTMF in-band, thereby reducing system complexity.Type: GrantFiled: November 23, 1999Date of Patent: November 18, 2003Assignee: Hughes Electronics CorporationInventors: Channasandra Ravishankar, David Roos, Anthony Noerpel, Chandra Joshi, James Hobza, Prabir Datta, Yi Chen
-
Publication number: 20030033505Abstract: A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit, dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit.Type: ApplicationFiled: May 24, 2001Publication date: February 13, 2003Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
-
Patent number: 6516065Abstract: A mobile satellite communication system is provided to control the transfer of a terminal for a single-hop call from at least one of a clear mode and a ciphered mode with respect to a gateway station to a ciphered mode with respect to a satellite link connecting the terminal with another terminal for a single-hop, terminal-to-terminal call using a cipher key and an encryption algorithm common to the terminal and the other terminal. Frame number offset data, which indicates a mapping delay between received and transmitted time slots at the satellite, is provided to both terminals in a terminal-to-terminal call for ciphering synchronization.Type: GrantFiled: February 11, 1999Date of Patent: February 4, 2003Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su
-
Patent number: 6438386Abstract: An approach for immediate channel assignment in a wireless communications system involves receiving a channel request message from a wireless transceiver, the channel request message including a dialed party number; forming an immediate assignment message including a channel assignment; transmitting the immediate assignment message to the wireless transceiver; and establishing a communications channel between the wireless transceiver and a called party by establishing a channel between the wireless transceiver and the called party.Type: GrantFiled: July 13, 1998Date of Patent: August 20, 2002Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony R. Noerpel, Gerard Stelzer, Mohammad Soleimani, Prabir Datta, Xiaoping He
-
Patent number: 6353738Abstract: An MSAT system is provided which optimizes satellite resources when implementing a single-hop TtT call. The system allocates satellite channels and signaling channels for a single-hop TtT call to the participating terminals at an early stage during the call set-up procedure such that only a single pair of satellite channels are assigned to each of the terminals for call establishment and for use during the call, as opposed to two pairs of satellite channels. A test message for signaling channel (e.g., TTCH) validation is transmitted from the network (e.g., from a gateway station controller) to each of the terminals.Type: GrantFiled: February 11, 1999Date of Patent: March 5, 2002Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su
-
Patent number: 6314290Abstract: A mobile satellite (MSAT) system is provided for establishing a single-hop terminal-to-terminal call between two terminals. The MSAT system maintains a signaling path between each terminal and a gateway station during the terminal-to-terminal call although a call path between the mobile switching center and the originating terminal is blocked by the satellite. During single-hop call establishment, satellite channels for the terminal-to-terminal call path and for signaling are allocated. The allocated channels are assigned when a direct satellite link for the terminal-to-terminal call is established; otherwise, the call can proceed as a double-hop call using previously assigned satellite channels. A verification signal is sent on the direct satellite link which is for processing by the terminals and which contains information that causes the signal to be ignored by a gateway station.Type: GrantFiled: February 11, 1999Date of Patent: November 6, 2001Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su, Dave Roos
-
Patent number: 6289482Abstract: An approach for error flow control in a communications system involves receiving a plurality of frames of data; determining in said plurality of frames of data, two or more contiguous defective frames of data, the two or more contiguous defective frames of data being followed by at least one frame of data in said plurality of frames that is not defective; forming a group reject message indicative of a range of the two or more contiguous defective frames; transmitting the group reject message; and receiving replacement frames, the replacement frames corresponding to the two or more contiguous defective frames, wherein said at least one frame that is not defective is not received again in response to the group reject message.Type: GrantFiled: July 13, 1998Date of Patent: September 11, 2001Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Xiaoping He, Prabir Datta
-
Publication number: 20010018348Abstract: An approach for immediate channel assignment in a wireless communications system involves receiving a channel request message from a wireless transceiver, the channel request message including a dialed party number; forming an immediate assignment message including a channel assignment; transmitting the immediate assignment message to the wireless transceiver; and establishing a communications channel between the wireless transceiver and a called party by establishing a channel between the wireless transceiver and the called party.Type: ApplicationFiled: July 13, 1998Publication date: August 30, 2001Inventors: CHANDRA JOSHI, ANTHONY NOERPEL, XIAOPING HE, PRABIR DATTA
-
Patent number: 6278876Abstract: A system and method for implementing single hop space segment terminal to terminal connections. The system includes a satellite-based radio frequency (RF) communication link for conveying multiple communication channels over the space segment via one or more spot beams. A terrestrial supervisory transceiver such as a gateway station is provided in communication with the satellite-based communication link. Mobile hand-held terminals (HHTs), herein first and second access terminals, may be located within one or more of the spot beams to communicate with one another via a single hop connection through a satellite of the system. A switch is provided for communication switching with the satellite of the system for the multiple communication channels to couple the first access terminal and the second access terminal over the space segment via one or more of the spot beams.Type: GrantFiled: July 13, 1998Date of Patent: August 21, 2001Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Neeraj Tewari, Gerard Stelzer, David Roos, Chi-Jiun Su
-
Patent number: 6249677Abstract: An apparatus and method, for use with the satellite-based communications network, for improving the reliability and speed at which communication between a user terminal and the network is established. The apparatus and method arranges data of a channel request message transmitted from a user terminal to a satellite in the satellite-based network to insure that the most critical data for establishing communication between the user terminal and the satellite-based network is received at the satellite during the appropriate receiving time frame window. The channel request message includes a first data group necessary for establishing a communication link for which information is transmitted between the apparatus and the network, and a second data group including information for decreasing the amount time necessary to establish the communication link.Type: GrantFiled: February 11, 1999Date of Patent: June 19, 2001Assignee: Hughes Electronics CorporationInventors: Anthony Noerpel, Chandra Joshi, Stephanie Demers
-
Patent number: 6247124Abstract: A computing system contains an apparatus having an instruction memory to store a plurality of lines of a plurality of instructions, and a branch memory to store a plurality of branch prediction entries, each branch prediction entry containing information for predicting whether a branch designated by a branch instruction stored in the instruction memory will be taken when the branch instruction is executed. Each branch prediction entry includes a branch target field for indicating a target address of a line containing a target instruction to be executed if the branch is taken, a destination field indicating where the target instruction is located within the line indicated by the branch target address, and a source field indicating where the branch instruction is located within the line corresponding to the target address.Type: GrantFiled: July 30, 1999Date of Patent: June 12, 2001Assignee: MIPS Technologies, Inc.Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
-
Patent number: 6233451Abstract: An access terminal for initiating spot beam selection in a satellite communication system, in which the access terminal includes a receiver for measuring the received signal strength (RSS) of a multiplicity of radio frequency communication spot beam links. The access terminal is further provided with a microcontroller for comparing the received signal strengths from each of the multiplicity of spot beams to initiate information communication via a communication channel of the satellite communication system. In a described embodiment, the controller of the access terminal compares seven spot beam links to determine whether to initiate information communication with one of the seven spot beams received. Additionally, a memory coupled to the controller of the access terminal is used for storing spot beam identification information including the spot beam links assigned to the access terminal via the satellite communication system.Type: GrantFiled: July 13, 1998Date of Patent: May 15, 2001Assignee: Hughes Electronics CorporationInventors: Anthony Noerpel, Chandra Joshi, Michael Parr, Zhengping Gao, Stephanie Demers
-
Patent number: 5954815Abstract: A computing system that contains an apparatus comprising an instruction memory to store a plurality of lines of a plurality of instructions, and a branch memory to store a plurality of branch prediction entries, each branch prediction entry containing information for predicting whether a branch designated by a branch instruction stored in the instruction memory will be taken when the branch instruction is executed. Each branch prediction entry includes a branch target field for indicating a target address of a line containing a target instruction to be executed if the branch is taken, a destination field indicating where the target instruction is located within the line indicated by the branch target address, and a source field indicating where the branch instruction is located within the line corresponding to the target address.Type: GrantFiled: January 10, 1997Date of Patent: September 21, 1999Assignee: Silicon Graphics, Inc.Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
-
Patent number: 5604909Abstract: A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit. A bypass circuit for bypassing the second instruction storing circuit is also provided.Type: GrantFiled: December 15, 1993Date of Patent: February 18, 1997Assignee: Silicon Graphics Computer Systems, Inc.Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal