Abstract: A memory for providing a signal buffering scheme for array and periphery signals and the operating method of the same are provided. The memory includes a plurality of columns of memory cells, a control circuit, and a control logic unit. The plurality of columns of memory cells may be connected to a local array signal generator via local control lines, which are connected to a global array signal generator via global control lines for receiving array signals. The control circuit may be connected to the memory cells for providing periphery signals. The control logic unit may be connected to the memory cells through a hierarchical structure of the global control lines and the local control lines. The control logic unit may be configured to provide the array signals and periphery signals having the same polarity to the global control lines and the local control lines.

Abstract: A system on-chip (SoC) device is provided. The SoC device includes an on-chip memory including memory banks, and internal clock generators. Each internal clock generator is coupled to one or more memory banks. Each internal clock generator generates one or more of an internal clock signal, a control signal and a clock reset signal locally for the memory bank to which the internal clock generator is coupled.

Abstract: A memory for providing a signal buffering scheme for array and periphery signals and the operating method of the same are provided. The memory includes a plurality of columns of memory cells, a control circuit, and a control logic unit. The plurality of columns of memory cells may be connected to a local array signal generator via local control lines, which are connected to a global array signal generator via global control lines for receiving array signals. The control circuit may be connected to the memory cells for providing periphery signals. The control logic unit may be connected to the memory cells through a hierarchical structure of the global control lines and the local control lines. The control logic unit may be configured to provide the array signals and periphery signals having the same polarity to the global control lines and the local control lines.

Abstract: A system on-chip (SoC) device is provided. The SoC device includes an on-chip memory including memory banks, and internal clock generators. Each internal clock generator is coupled to one or more memory banks. Each internal clock generator generates one or more of an internal clock signal, a control signal and a clock reset signal locally for the memory bank to which the internal clock generator is coupled.

Abstract: Disclosed herein are enhancements for operating an input/output (I/O) management cluster with end I/O devices. In one implementation, a method of operating an I/O cluster includes, in a first I/O management node of the I/O management cluster, executing a first application to manage data for an I/O device communicatively coupled via at least one switch to the first I/O management node. The method further provides identifying a failure in the first I/O management node related to processing the data for the I/O device and, in response to the failure, configuring the at least one switch to communicate the data for the I/O device with a second I/O management node of the I/O management cluster. The method also includes, in the second I/O management node and after configuring the at least one switch, executing a second application to manage the data for the I/O device.

Abstract: The invention is directed to a method for producing metal-containing particles, the method comprising subjecting an aqueous solution comprising a metal salt, Eh, lowering reducing agent, pH adjusting agent, and water to conditions that maintain the Eh value of the solution within the bounds of an Eh-pH stability field corresponding to the composition of the metal-containing particles to be produced, and producing said metal-containing particles in said aqueous solution at a selected Eh value within the bounds of said Eh-pH stability field. The invention is also directed to the resulting metal-containing particles as well as devices in which they are incorporated.

Abstract: An electronic system having an assembly of a plurality of electronic devices each driven by a local power unit and a power sequencer control circuit for controlling the power on or off operation of the local power units. The electronic devices can be for example display units of a display wall. An advantage of such an assembly, e.g. a tiled display or display wall, is that a low level or as little energy as possible is dissipated by the local power units such as DC power supplies associated with the electronic devices, e.g. tiles of a display, and the associated “housekeeping” electronics. A further advantage is a limitation of the inrush current at start-up.

Abstract: The present invention relates to method and device invention made in SS316LN for tuning single-cell or multi-cell SCRF cavity for precise slow and fast tuning with low hysteresis. The tuning mechanism (device) for SCRF cavity consists of two thick square flanges connected to each other through two parallel sets of X-link levers pivoted in between such that the motion of top end of flange and bottom end of flange equalizes; wherein the top end of X-link connects one square flange to the bottom end of the other square flange and vice-versa using thin flat flexure plates; wherein the flexure plates are joined on X-link and square flange by bolts having spring locks; the square flanges have platform on the top that transfer motion and these are connected through power screw mechanism; wherein the power screw for linear actuation is rotated using worm-wheel.

Abstract: A solar call is provided along with a method for forming a semiconductor nanocrystalline silicon insulating thin-film with a tunable bandgap. The method provides a substrate and introduces a silicon (Si) source gas with at least one of the following source gases: germanium (Ge), oxygen, nitrogen, or carbon into a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. A SiOxNyCz thin-film embedded with a nanocrystalline semiconductor material is deposited overlying the substrate, where x, y, z?0, and the semiconductor material is Si, Ge, or a combination of Si and Ge. As a result, a bandgap is formed in the SiOxNyCz thin-film, in the range of about 1.9 to 3.0 electron volts (eV). Typically, the semiconductor nanoparticles have a size in a range of 1 to 20 nm.

Abstract: A first processor receives a write request from an input/output (I/O) device connected to the first processor. The first processor determines whether the write request satisfies an allocating write criterion. Responsive to determining that the write request satisfies the allocating write criterion, the first processor writes data associated with the write request to a cache of the first processor.

Abstract: An 8T memory bit cell receives a clock signal and read and write address signals. A read address latch/clock circuit receives the clock signal and the read address signals and initiates a read operation during a first clock cycle state. A write address flip-flop/clock circuit receives the clock signal and the write address signals and initiates a write operation during a second clock cycle state. An inverter receives and inverts the clock signal and applies the inverted clock signal to the write address flip-flop/clock circuit. The read address latch/clock circuit initiates a read word line precharge operation during the second clock cycle state and a write word line precharge operation during the first clock cycle state. The write address flip-flop/clock circuit may also include a loose self-timer to end a write cycle is a clock signal continues beyond a predetermined time.

Abstract: The invention is directed to a method for producing metal-containing particles, the method comprising subjecting an aqueous solution comprising a metal salt, Eh, lowering reducing agent, pH adjusting agent, and water to conditions that maintain the Eh value of the solution within the bounds of an Eh-pH stability field corresponding to the composition of the metal-containing particles to be produced, and producing said metal-containing particles in said aqueous solution at a selected Eh value within the bounds of said Eh-pH stability field. The invention is also directed to the resulting metal-containing particles as well as devices in which they are incorporated.

Abstract: The invention is directed to a method for producing metal oxide particles, the method comprising subjecting non-oxide metal-containing particles to an oxidation step that converts the non-oxide metal-containing particles to said metal oxide particles. The invention is also directed to the resulting metal oxide compositions. In particular embodiments, non-oxide precursor particles are produced by microbial means, and the produced non-oxide precursor particles subjected to oxidation conditions under elevated temperature conditions (e.g., by a thermal pulse) to produce metal oxide particles or a metal oxide film.

Abstract: An 8T memory bit cell receives a clock signal and read and write address signals. A read address latch/clock circuit receives the clock signal and the read address signals and initiates a read operation during a first clock cycle state. A write address flip-flop/clock circuit receives the clock signal and the write address signals and initiates a write operation during a second clock cycle state. An inverter receives and inverts the clock signal and applies the inverted clock signal to the write address flip-flop/clock circuit. The read address latch/clock circuit initiates a read word line precharge operation during the second clock cycle state and a write word line precharge operation during the first clock cycle state. The write address flip-flop/clock circuit may also include a loose self-timer to end a write cycle is a clock signal continues beyond a predetermined time.

Abstract: A method is provided for fabricating a semiconductor nanoparticle embedded Si insulating film for short wavelength luminescence applications. The method provides a bottom electrode, and deposits a semiconductor nanoparticle embedded Si insulating film, including the element of N, O, or C, overlying the bottom electrode. After annealing, a semiconductor nanoparticle embedded Si insulating film has a peak photoluminescence (PL) at a wavelength in the range of 475 to 750 nanometers.

Abstract: A method of performing a fluid-material assay employing a device including at least one active pixel having a sensor with an assay site functionalized for selected fluid-assay material. The method includes exposing the pixel's sensor assay site to such material, and in conjunction with such exposing, and employing the active nature of the pixel, remotely requesting from the pixel's sensor assay site an assay-result output report. The method further includes, in relation to the employing step, creating, relative to the sensor's assay site in the at least one pixel, a predetermined, pixel-specific electromagnetic field environment.

Abstract: A digitally-addressable, pixelated, DNA fluid-assay, active-matrix micro-structure formed, utilizing low-temperature TFT and Si technology, on a substrate preferably made of glass or plastic, and including at least one pixel which is defined by (a) an addressable pixel site, (b) a sensor home structure disposed within that site for receiving and hosting a functionalized assay site possessing a DNA oligonucleotide probe, and (c) an addressable, pixel-site-specific, energy-field-producing functionalizer (preferably optical) operable to functionalize such a probe on the assay site. Each pixel may also include a pixel-integrated optical detector. Further disclosed are related methodology facets involving (1) the making of such a micro-structure (a) in a precursor form (without a functionalized probe), and thereafter (b) in a finalized/functionalized form (with such a probe), and (2) the ultimate use of a completed micro-structure in the performance of a DNA assay.

Abstract: A method of producing a precursor, active-matrix, fluid-assay micro-structure including the steps of (1) utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of non-functionalized pixels, and (2) preparing at least one of these pixels for individual, digitally-addressed (a) functionalization, and (b) reading out, ultimately, of completed assay results.

Abstract: A pixel-by-pixel, digitally-addressable, pixelated, precursor, fluid-assay, active-matrix micro-structure including plural pixels formed preferably on a glass or plastic substrate, wherein each pixel, formed utilizing low-temperature TFT and Si technology, includes (a) at least one non-functionalized, digitally-addressable assay sensor, and (b), disposed operatively adjacent this sensor, digitally-addressable and energizable electromagnetic field-creating structure which is selectively energizable to create, in the vicinity of the at least one assay sensor, an ambient electromagnetic field environment which is structured to assist in functionalizing, as a possession on said at least one assay sensor, at least one digitally-addressable assay site which will display an affinity for a selected fluid-assay material.

Abstract: A method for producing an active-matrix, fluid-assay micro-structure including, utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of digitally-addressable, assay-material-specific-functionalizable pixels, and employing pixel-specific digital addressing for selected, array-established pixels, individually functionalizing these pixels.