Patents by Inventor Chandra Joshi
Chandra Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080079663Abstract: A pixel-by-pixel, digitally-addressable, pixelated, precursor, fluid-assay, active-matrix micro-structure including plural pixels formed on a substrate, wherein each pixel includes (a) at least one non-functionalized, digitally-addressable assay sensor, and (b), disposed operatively adjacent this sensor, digitally-addressable and energizable electromagnetic field-creating structure which is selectively energizable to create, in the vicinity of the at least one assay sensor, an ambient electromagnetic field environment which is structured to assist in functionalizing, as a possession on said at least one assay sensor, at least one digitally-addressable assay site which will display an affinity for a selected fluid-assay material.Type: ApplicationFiled: June 22, 2007Publication date: April 3, 2008Inventors: John W. Hartzell, Pooran Chandra Joshi, Paul J. Schuele
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Patent number: 7259055Abstract: A method for forming a high-luminescence Si electroluminescence (EL) phosphor is provided, with an EL device made from the Si phosphor. The method comprises: depositing a silicon-rich oxide (SRO) film, with Si nanocrystals, having a refractive index in the range of 1.5 to 2.1, and a porosity in the range of 5 to 20%; and, post-annealing the SRO film in an oxygen atmosphere. DC-sputtering or PECVD processes can be used to deposit the SRO film. In one aspect the method further comprises: HF buffered oxide etching (BOE) the SRO film; and, re-oxidizing the SRO film, to form a SiO2 layer around the Si nanocrystals in the SRO film. In one aspect, the SRO film is re-oxidized by annealing in an oxygen atmosphere. In this manner, a layer of SiO2 is formed around the Si nanocrystals having a thickness in the range of 1 to 5 nanometers (nm).Type: GrantFiled: February 24, 2005Date of Patent: August 21, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Tingkai Li, Pooran Chandra Joshi, Wei Gao, Yoshi Ono, Sheng Teng Hsu
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Patent number: 7196383Abstract: An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.Type: GrantFiled: January 28, 2005Date of Patent: March 27, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, John W. Hartzell, Masahiro Adachi, Yoshi Ono
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Patent number: 7186663Abstract: A method is provided for forming a Si and Si—Ge thin films. The method comprises: providing a low temperature substrate material of plastic or glass; supplying an atmosphere; performing a high-density (HD) plasma process, such as an HD PECVD process using an inductively coupled plasma (ICP) source; maintaining a substrate temperature of 400 degrees C., or less; and, forming a semiconductor layer overlying the substrate that is made from Si or Si-germanium. The HD PECVD process is capable of depositing Si at a rate of greater than 100 ? per minute. The substrate temperature can be as low as 50 degrees C. Microcrystalline Si, a-Si, or a polycrystalline Si layer can be formed over the substrate. Further, the deposited Si can be either intrinsic or doped. Typically, the supplied atmosphere includes Si and H. For example, an atmosphere can be supplied including SiH4 and H2, or comprising H2 and Silane with H2/Silane ratio in the range of 0–100.Type: GrantFiled: June 17, 2004Date of Patent: March 6, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, Apostolos T. Voutsas, John W. Hartzell
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Patent number: 7122487Abstract: A deposition oxide interface with improved oxygen bonding and a method for bonding oxygen in an oxide layer are provided. The method includes depositing an M oxide layer where M is a first element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5, plasma oxidizing the M oxide layer at a temperature of less than 400° C. using a high density plasma source, and in response to plasma oxidizing the M oxide layer, improving M-oxygen bonding in the M oxide layer. The plasma oxidation process diffuses excited oxygen radicals into the oxide layer. The plasma oxidation is performed at specified parameters including temperature, power density, pressure, process gas composition, and process gas flow. In some aspects of the method, M is silicon, and the oxide interface is incorporated into a thin film transistor.Type: GrantFiled: March 15, 2004Date of Patent: October 17, 2006Assignee: Sharp Laboratories of America, Inc.Inventor: Pooran Chandra Joshi
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Patent number: 7122488Abstract: Methods are provided for forming silicon dioxide (SiO2) on a silicon carbide (SiC) substrate. The method comprises: providing a SiC substrate; supplying an atmosphere including oxygen; performing a high-density (HD) plasma-based process; and, forming a SiO2 layer overlying the SiC substrate. Typically, performing the HD plasma-based process includes connecting a top electrode to an inductively coupled HD plasma source. In one aspect, SiO2 is grown on the SiC substrate. Then, an HD plasma oxidation process is performed that creates a reactive oxygen species and breaks the Si—C bonds in the SiC substrate, to form free Si and C atoms in the SiC substrate. The free Si atoms in the SiC substrate are bonded to the HD plasma-generated reactive oxygen species, and the SiO2 layer is grown.Type: GrantFiled: March 29, 2004Date of Patent: October 17, 2006Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, Apostolos T. Voutsas, John W. Hartzell
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Patent number: 7087537Abstract: A method for fabricating a thin film oxide is provided. The method includes: forming a substrate; treating the substrate at temperatures equal to and less than 360° C. using a high density (HD) plasma source; and forming an M oxide layer overlying the substrate where M is an element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5. In some aspects, the method uses an inductively coupled plasma (ICP) source. In some aspects the ICP source is used to plasma oxidize the substrate. In other aspects, HD plasma enhanced chemical vapor deposition is used to deposit the M oxide layer on the substrate. In some aspects of the method, M is silicon and a silicon layer and an oxide layer are incorporated into a TFT.Type: GrantFiled: March 15, 2004Date of Patent: August 8, 2006Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, Apostolos T. Voutsas
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Publication number: 20050226160Abstract: Multi-PHY addressing from source to destination in which n-number of channels or ports are used in a PHY layer device for communication with a link layer device. A single link layer to a single-PHY layer topology and a single link layer to a multi-PHY layer topology comprising multiple ports or channels receives a plurality of channels groups. Status indication signal is provided on continuous basis for the direct status for up to a predetermined number of channels.Type: ApplicationFiled: June 3, 2005Publication date: October 13, 2005Inventors: Jay Sethuram, Richard Weber, Chandra Joshi
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Patent number: 6902960Abstract: An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.Type: GrantFiled: November 14, 2002Date of Patent: June 7, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, John W. Hartzell, Masahiro Adachi, Yoshi Ono
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Publication number: 20040214365Abstract: A deposition oxide interface with improved oxygen bonding and a method for bonding oxygen in an oxide layer are provided. The method includes depositing an M oxide layer where M is a first element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5, plasma oxidizing the M oxide layer at a temperature of less than 400° C. using a high density plasma source, and in response to plasma oxidizing the M oxide layer, improving M-oxygen bonding in the M oxide layer. The plasma oxidation process diffuses excited oxygen radicals into the oxide layer. The plasma oxidation is performed at specified parameters including temperature, power density, pressure, process gas composition, and process gas flow. In some aspects of the method, M is silicon, and the oxide interface is incorporated into a thin film transistor.Type: ApplicationFiled: March 15, 2004Publication date: October 28, 2004Applicant: Sharp Laboratories of America, Inc.Inventor: Pooran Chandra Joshi
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Publication number: 20040094808Abstract: An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.Type: ApplicationFiled: November 14, 2002Publication date: May 20, 2004Applicant: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, John W. Hartzell, Masahiro Adachi, Yoshi Ono
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Patent number: 6689646Abstract: A method is provided for fabricating a thin film oxide. The method include forming a first silicon layer, applying a second silicon layer overlying the first silicon layer, oxidizing the second silicon layer at a temperature of less than 400° C. using an inductively coupled plasma source, and forming a thin film oxide layer overlying the first silicon layer. In some cases, the thin film oxide layer overlies the oxidized second silicon layer and is formed by a high-density plasma enhanced chemical vapor deposition process and an inductively coupled plasma source at a temperature of less than 400° C. In some cases, the thin film oxide layer and the first silicon layer are incorporated into a thin film transistor and the thin film oxide layer has a fixed oxide charge density of 3×1011 per square centimeter.Type: GrantFiled: November 14, 2002Date of Patent: February 10, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, John W. Hartzell, Masahiro Adachi, Yoshi Ono
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Patent number: 6691221Abstract: A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit. The instruction loading circuit loads the L instructions from the second instruction storing circuit into the positions previously occupied by the L instructions dispatched from the first instruction storing circuit.Type: GrantFiled: May 24, 2001Date of Patent: February 10, 2004Assignees: Mips Technologies, Inc., Kabushiki Kaisha ToshibaInventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
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Patent number: 6650895Abstract: A system and a methodology to improve the end-user quality of service both in terms of response time and reliability for the transport of in-call DTMF signals in wireless systems, particularly in geostationary mobile satellite systems. The methodology encompasses several techniques to provide acceptable end-to-end quality of service for DTMF. A technique is applicable for transport of DTMF in the wireless subscriber to network direction, where DTMF digits are carried in the form of an out-band message. The central part of the technique is to allow multiple key presses in the same message, thereby increasing efficiency and throughput in long-delay environment. Another technique utilizes the vocoder's functionality to carry DTMF in-band, thereby reducing system complexity.Type: GrantFiled: November 23, 1999Date of Patent: November 18, 2003Assignee: Hughes Electronics CorporationInventors: Channasandra Ravishankar, David Roos, Anthony Noerpel, Chandra Joshi, James Hobza, Prabir Datta, Yi Chen
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Publication number: 20030033505Abstract: A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit, dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit.Type: ApplicationFiled: May 24, 2001Publication date: February 13, 2003Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
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Patent number: 6516065Abstract: A mobile satellite communication system is provided to control the transfer of a terminal for a single-hop call from at least one of a clear mode and a ciphered mode with respect to a gateway station to a ciphered mode with respect to a satellite link connecting the terminal with another terminal for a single-hop, terminal-to-terminal call using a cipher key and an encryption algorithm common to the terminal and the other terminal. Frame number offset data, which indicates a mapping delay between received and transmitted time slots at the satellite, is provided to both terminals in a terminal-to-terminal call for ciphering synchronization.Type: GrantFiled: February 11, 1999Date of Patent: February 4, 2003Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su
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Patent number: 6438386Abstract: An approach for immediate channel assignment in a wireless communications system involves receiving a channel request message from a wireless transceiver, the channel request message including a dialed party number; forming an immediate assignment message including a channel assignment; transmitting the immediate assignment message to the wireless transceiver; and establishing a communications channel between the wireless transceiver and a called party by establishing a channel between the wireless transceiver and the called party.Type: GrantFiled: July 13, 1998Date of Patent: August 20, 2002Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony R. Noerpel, Gerard Stelzer, Mohammad Soleimani, Prabir Datta, Xiaoping He
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Patent number: 6353738Abstract: An MSAT system is provided which optimizes satellite resources when implementing a single-hop TtT call. The system allocates satellite channels and signaling channels for a single-hop TtT call to the participating terminals at an early stage during the call set-up procedure such that only a single pair of satellite channels are assigned to each of the terminals for call establishment and for use during the call, as opposed to two pairs of satellite channels. A test message for signaling channel (e.g., TTCH) validation is transmitted from the network (e.g., from a gateway station controller) to each of the terminals.Type: GrantFiled: February 11, 1999Date of Patent: March 5, 2002Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su
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Patent number: 6314290Abstract: A mobile satellite (MSAT) system is provided for establishing a single-hop terminal-to-terminal call between two terminals. The MSAT system maintains a signaling path between each terminal and a gateway station during the terminal-to-terminal call although a call path between the mobile switching center and the originating terminal is blocked by the satellite. During single-hop call establishment, satellite channels for the terminal-to-terminal call path and for signaling are allocated. The allocated channels are assigned when a direct satellite link for the terminal-to-terminal call is established; otherwise, the call can proceed as a double-hop call using previously assigned satellite channels. A verification signal is sent on the direct satellite link which is for processing by the terminals and which contains information that causes the signal to be ignored by a gateway station.Type: GrantFiled: February 11, 1999Date of Patent: November 6, 2001Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Chi-Jiun Su, Dave Roos
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Patent number: 6289482Abstract: An approach for error flow control in a communications system involves receiving a plurality of frames of data; determining in said plurality of frames of data, two or more contiguous defective frames of data, the two or more contiguous defective frames of data being followed by at least one frame of data in said plurality of frames that is not defective; forming a group reject message indicative of a range of the two or more contiguous defective frames; transmitting the group reject message; and receiving replacement frames, the replacement frames corresponding to the two or more contiguous defective frames, wherein said at least one frame that is not defective is not received again in response to the group reject message.Type: GrantFiled: July 13, 1998Date of Patent: September 11, 2001Assignee: Hughes Electronics CorporationInventors: Chandra Joshi, Anthony Noerpel, Xiaoping He, Prabir Datta