Abstract: A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.

Abstract: Certain aspects of an apparatus and method for method and apparatus for tissue region identification may include segmenting the image into a plurality of regions, filtering out regions in the plurality of regions which are curvilinear, and isolating a target area where the tissue sample is identified as the plurality of regions not filtered.

Abstract: A magnetoresistive random access memory (MRAM) structure includes a bottom electrode structure. A magnetic tunnel junction (MTJ) element is over the bottom electrode structure. The MTJ element includes an anti-ferromagnetic material layer. A ferromagnetic pinned layer is over the anti-ferromagnetic material layer. A tunneling layer is over the ferromagnetic pinned layer. A ferromagnetic free layer is over the tunneling layer. The ferromagnetic free layer has a first portion and a demagnetized second portion. The MRAM also includes a top electrode structure over the first portion.

Abstract: A wireless authentication system includes an execution end device and a control end device. When the execution end device and the control end device receive an activation signal, the execution end device generates a time related random code, and transmits the time related random code to the control end device; and the control end device generates a comparison authentication code according to the time related random code, a fixed password and a variable password. When the execution end device determines that the comparison authentication code corresponds to a set of data stored in the execution end device, the execution end device performs a predetermined operation, and the variable password is changed.

Abstract: A phase change memory cell includes a first contact, a phase change region above and in contact with the first contact, an electrode region, and a second contact above and in contact with the electrode region. The phase change region surrounds the electrode region. The electrode region has a first surface in contact with the phase change region and a second surface in contact with the second contact, and the second surface is wider than the first surface.

Abstract: A fine pitch phase change random access memory (“PCRAM”) design and method of fabricating same are disclosed. One embodiment is a phase change memory (“PCM”) cell comprising a spacer defining a rectangular reaction area and a phase change material layer disposed within the reaction area. The PCM cell further comprises a protection layer disposed over the GST film layer and within the area defined by the spacer; and a capping layer disposed over the protection layer and the spacer.

Abstract: Methods, systems, and apparatuses are described for reducing the latency in a transceiver. A transceiver includes a high latency communication channel and a low latency communication channel that is configured to be a bypass channel for the high latency communication channel. The low latency communication channel may be utilized when implementing the transceiver is used in low latency applications. By bypassing the high latency communication channel, the high latency that is introduced therein (due to the many stages of de-serialization used to reduce the data rate for digital processing) can be avoided. An increase in data rate is realized when the low latency communication channel is used to pass data. A delay-locked loop (DLL) may be used to phase align the transmitter clock of the transceiver with the receiver clock of the transceiver to compensate for a limited tolerance of phase offset between these clocks.

Abstract: A method for forming an enhancement mode GaN HFET device with an isolation area that is self-aligned to a contact opening or metal mask window. Advantageously, the method does not require a dedicated isolation mask and the associated process steps, thus reducing manufacturing costs. The method includes providing an EPI structure including a substrate, a buffer layer a GaN layer and a barrier layer. A dielectric layer is formed over the barrier layer and openings are formed in the dielectric layer for device contact openings and an isolation contact opening. A metal layer is then formed over the dielectric layer and a photoresist film is deposited above each of the device contact openings. The metal layer is then etched to form a metal mask window above the isolation contact opening and the barrier and GaN layer are etched at the portion that is exposed by the isolation contact opening in the dielectric layer.

Abstract: Provided herein are nucleic acid constructs that contain a synthetic control element that includes a cis-regulator of translation, and an adapter translation-coupled regulator of transcription. Further provided herein are nucleic acid constructs that contain nucleic acid sequences under the control of the synthetic control elements. Also provided are compositions and methods related to the nucleic acid constructs.

Abstract: A method of forming and a magnetoresistive random access memory (MRAM) device. In an embodiment, the MRAM device includes a magnetic tunnel junction (MTJ) disposed over a bottom electrode, the magnetic tunnel junction having a first sidewall, a top electrode disposed over the magnetic tunnel junction, and a dielectric spacer supported by the magnetic tunnel junction and extending along sidewalls of the top electrode, the dielectric spacer having a second sidewall substantially co-planar with the first sidewall of the magnetic tunnel junction.

Abstract: An exemplary method of creating a target storage layout table referenced for partitioning a storage space of a storage device includes following steps: identifying defective storage areas in the storage space of the storage device, and accordingly generating an identification result; and creating the target storage layout table according to the identification result; wherein when the identification result indicates that an actual storage area corresponding to a pre-defined partition with a pre-defined partition size has at least one defective area, setting a partition size of a partition defined in the target storage layout table according to the pre-defined partition size and a size of the at least one defective area.

Abstract: According to an embodiment, a magnetoresistive random access memory (MRAM) device comprises a bottom electrode, a stack, a dielectric material, a dielectric layer, and a conductive material. The bottom electrode is over a substrate, and the stack is over the bottom electrode. The stack comprises a magnetic tunnel junction (MTJ) and a top electrode. The dielectric material is along a sidewall of the stack, and the dielectric material has a height greater than a thickness of the MTJ and less than a stack height. The dielectric layer is over the stack and the dielectric material. The conductive material extends through the dielectric layer to the top electrode of the stack.

Abstract: A communications apparatus. Multiple antennas are arranged to receive downlink signals and transmit uplink signals. A transceiver module is arranged to receive the downlink signals from the antennas and pass the uplink signals to an antenna selection device. The antenna selection device is coupled between the antennas and the transceiver module and arranged to receive the uplink signals to be transmitted from the transceiver module and dynamically pass the uplink signals to one of the antennas according to an antenna selection signal. A processor is arranged to receive the downlink signals from the transceiver module, calculate short-term signal qualities of the downlink signals and generate the antenna selection signal according to the short-term signal qualities.

Abstract: A remote conference control method, a terminal equipment, a multipoint control unit (MCU), and a video conferencing system, where the method includes: when a conference joining terminal receives pause conference indication information sent by a multipoint control unit MCU during a process of a video conference, disabling, by the conference joining terminal according to the received pause conference indication information, a media channel of the conference joining terminal, saving channel parameters, and entering a standby or hibernation state; when the conference joining terminal receives resume conference indication information sent by the MCU, enabling, by the conference joining terminal according to the received resume conference indication information and the saved channel parameters, the media channel of the conference joining terminal, and resuming a working state.

Abstract: A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer.

Abstract: The present invention discloses a touch panel, which includes a substrate, a plurality of first axis electrodes, a plurality of second axis electrodes and an insulation structure. The first axis electrodes are disposed on the substrate along a first direction and each of the first axis electrodes includes a plurality of first sub electrodes and a plurality of connection structures. Each of the connection structures is at least partially disposed between each of the first sub electrodes and the substrate, and is electrically connected to two adjacent first sub electrodes. Each of the connection structures includes a first metal layer and a low reflective layer disposed between the substrate and the first metal layer. The low reflective layer of the present invention is applied to reduce the visibility of the connection structures, as well as to enhance the reliability of the touch panel.

Abstract: A back frame module includes a base plate, two locking plate members, a cable organizing plate, and a stowage plate. The base plate is adapted to be provided on a rear face of a display. The locking plate members, the cable organizing plate, and the stowage plate are selectively connected to the base plate. The locking plate members are adapted for mounting of a computer device therebetween. The cable organizing plate is adapted to stow a cable of the display or of the computer device. The stowage plate is adapted to stow an adapter of the display or other accessories. The locking plate members, the cable organizing plate, and the stowage plate can be selectively substituted by a support plate. The back frame module thus has various states of use to satisfy different user requirements.

Abstract: A touch-sensing display device includes a display panel, a touch panel, a driver unit, and a flexible printed circuit board. The touch panel is disposed on the display panel, and the driver unit is disposed on the display panel to provide driving signals and drive the display panel and the touch panel. The flexible printed circuit board connects the display panel to a system main board.

Abstract: A data interaction method is provided, which includes: sending simultaneously an address detection request for a UDP channel and an address detection request for a TCP channel; and when both address detection for the UDP channel and address detection for the TCP channel fail, sending an address detection request for an HTTP channel; when detection of at least one channel succeeds, collecting two types of addresses corresponding to each channel in the at least one channel; performing address exchange and address matching with a peer client host; and performing channel connectivity detection based on matched addresses, and selecting a channel with a highest priority from channels on which connectivity detection is successful for data interaction with the peer client host. Therefore, efficiency of traversing a NAT host during address detection is improved.