Patents by Inventor Chang Chang
Chang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240029661Abstract: An electronic device such as a head-mounted device may have displays. The display may have regions of lower and higher resolution to reduce data bandwidth and power consumption for the display while preserving satisfactory image quality. Data lines may be shared by lower and higher resolution portions of a display or different portions of a display with different resolutions may be supplied with different numbers of data lines. Data line length may be varied in transition regions between lower resolution and higher resolution portions of a display to reduce visible discontinuities between the lower and higher resolution portions. The lower and higher resolution portions of the display may be dynamically adjusted using dynamically adjustable gate driver circuitry and dynamically adjustable data line driver circuitry.Type: ApplicationFiled: October 2, 2023Publication date: January 25, 2024Inventors: Cheng Chen, Jason C. Sauers, Fletcher R. Rothkopf, David W. Lum, Chun-Yao Huang, Enkhamgalan Dorjgotov, Graham B. Myhre, Bennett S. Wilburn, Paolo Sacchetto, Shih Chang Chang, Wonjae Choi, Cheuk Chi Lo
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Publication number: 20240021513Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a plurality of conductive contacts overlying a semiconductor substrate. A plurality of first conductive wires is disposed on the plurality of conductive contacts. A plurality of conductive vias overlies the first conductive wires. An etch stop structure is disposed on the first conductive wires. The plurality of conductive vias extend through the etch stop structure. The etch stop structure includes a first etch stop layer, a first insulator layer, and a second etch stop layer. The first insulator layer is disposed between the first etch stop layer and the second etch stop layer.Type: ApplicationFiled: January 4, 2023Publication date: January 18, 2024Inventors: Yung-Chang Chang, Lee-Chuan Tseng, Chia-Hua Lin, Shu-Hui Su
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Patent number: 11875745Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.Type: GrantFiled: February 21, 2023Date of Patent: January 16, 2024Assignee: Apple Inc.Inventors: Chin-Wei Lin, Hung Sheng Lin, Shih Chang Chang, Shinya Ono
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Patent number: 11876099Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.Type: GrantFiled: January 18, 2023Date of Patent: January 16, 2024Assignee: Apple Inc.Inventors: Hiroshi Osawa, Kyung-Wook Kim, Ming-Chin Hung, Shih Chang Chang, Yu-Cheng Chen
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Patent number: 11861110Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.Type: GrantFiled: September 29, 2022Date of Patent: January 2, 2024Assignee: Apple Inc.Inventors: Rungrot Kitsomboonloha, Donggeon Han, Jason N Gomez, Kyung Wook Kim, Nikolaus Hammler, Pei-En Chang, Saman Saeedi, Shih Chang Chang, Shinya Ono, Suk Won Hong, Szu-Hsien Lee, Victor H Yin, Young-Jik Jo, Yu-Heng Cheng, Joyan G Sanctis, Hongwoo Lee
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Patent number: 11855369Abstract: A connector assembly includes multiple terminals. Each terminal includes a conductive portion. The terminals include first and second high speed signal terminals and a low speed signal terminal. The conductive portions of the first and second high speed signal terminals and the low speed signal terminal are correspondingly defined as first, second and third conductive portions. An adapter board is located above a circuit board to be conductively connected to a cable directly or indirectly. The adapter board includes first and second signal circuit layers located at different heights. The first signal circuit layer includes a first high speed signal circuit conductively connecting the first conductive portion and a conductive wire of the cable. The second signal circuit layer includes a second high speed signal circuit conductively connecting the second conductive portion and another conductive wire of the cable. The third conductive portion is conductively connected to the circuit board.Type: GrantFiled: November 15, 2021Date of Patent: December 26, 2023Assignee: LOTES CO., LTDInventors: Jun Liu, Chien Chih Ho, Wen Chang Chang
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Patent number: 11854490Abstract: To reduce the amount of space occupied in the inactive area of a display by gate driver circuitry, at least a portion of the gate driver circuitry may be positioned in the active area of the display. To accommodate the gate driver circuitry, emissive sub-pixels may be laterally shifted relative to corresponding thin-film transistor sub-pixels. This allows for the thin-film transistor sub-pixels to be grouped adjacent to the central area of the active area, leaving room along an edge of the active area to accommodate one or more additional display components such as gate driver circuitry or fanout portions of data lines.Type: GrantFiled: August 2, 2022Date of Patent: December 26, 2023Assignee: Apple Inc.Inventors: Levent Erdal Aygun, Chin-Wei Lin, Yun Wang, Xin Lin, Aida R Colon-Berrios, Shih Chang Chang, Fan Gui, Mohammad Reza Esmaeili Rad, Ran Tu, Warren S Rieutort-Louis, Abbas Jamshidi Roudbari, Bhadrinarayana Lalgudi Visweswaran, Cheng-Chih Hsieh, Ricardo A Peterson, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Yuchi Che
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Patent number: 11851534Abstract: A method for preparing a fiber-containing molding compound includes the acts of a) providing a composite material which includes a first resin and fibers impregnated with the first resin, and b) mixing the composite material with a treatment medium which includes a diluent to form a mixture. The fiber-containing molding compound thus prepared has an adjustable fiber content.Type: GrantFiled: September 14, 2020Date of Patent: December 26, 2023Assignee: SRAM, LLCInventors: Hung I Chen, Chia-Chang Chang, Ching-Han Liu, Huan-Ching Hsu
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Patent number: 11854924Abstract: A semiconductor device includes a semiconductor die having an active surface, an opposite surface, a vertical sidewall extending between the active surface and the opposite surface, and input/output (I/O) connections disposed on the active surface. A redistribution layer (RDL) is disposed on the active surface of the semiconductor die. A plurality of first connecting elements is disposed on the RDL. A molding compound encapsulates the opposite surface and the vertical sidewall of the semiconductor die. The molding compound also covers the RDL and surrounds the plurality of first connecting elements. An interconnect substrate is mounted on the plurality of first connecting elements and on the molding compound.Type: GrantFiled: October 27, 2021Date of Patent: December 26, 2023Assignee: MEDIATEK INC.Inventors: Tien-Chang Chang, Yan-Liang Ji
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Patent number: 11848509Abstract: An electrical connector includes an insulating body having a mating slot and multiple accommodating slots are in communication with the mating slot. Multiple terminals are accommodated in the accommodating slots. The terminals include ground terminals. Each terminal includes a connecting portion, an elastic arm, a tail portion, and an extending portion located between the connecting portion and the tail portion. The extending portion of each terminal extends obliquely downward and backward from the connecting portion. A grounding member is provided on the insulating body. The grounding member has a multiple upper and lower extending arms. A length of each upper extending arm is shorter than a length of each lower extending arm in the front-rear direction. The upper and lower extending arms respectively abut the ground terminals, thus shortening the transmission paths of the terminals. The grounding member and the ground terminals are in stable connection, thus reducing the resonance.Type: GrantFiled: November 15, 2021Date of Patent: December 19, 2023Assignee: LOTES CO., LTDInventors: Wen Chang Chang, Nan Zhou
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Publication number: 20230402388Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a first dielectric layer positioned on the substrate; a first conductive structure positioned in the first dielectric layer and including a bottle-shaped cross-sectional profile; a first conductive layer positioned between the first conductive structure and the first dielectric layer and between the first conductive structure and the substrate; an adhesive layer positioned between the first conductive layer and the first dielectric layer and between the first conductive layer and the substrate. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure. An aspect ratio of the composite contact structure is greater than 7.Type: ApplicationFiled: June 8, 2022Publication date: December 14, 2023Inventors: YU-CHANG CHANG, PO-HUNG CHEN
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Publication number: 20230399738Abstract: The present application discloses a method for fabricating a semiconductor device. The method includes forming a first dielectric layer on a substrate; forming an expanded hole in the first dielectric layer; conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process; conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process; and forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure.Type: ApplicationFiled: June 8, 2022Publication date: December 14, 2023Inventors: YU-CHANG CHANG, PO-HUNG CHEN
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Patent number: 11842925Abstract: The present application discloses method for fabricating a conductive feature and a method for fabricating a semiconductor device. The method includes providing a substrate; forming a recess in the substrate; conformally forming a first nucleation layer in the recess; performing a post-treatment to the first nucleation layer; and forming a first bulk layer on the first nucleation layer to fill the recess. The first nucleation layer and the first bulk layer configure the conductive feature. The first nucleation layer and the first bulk layer include tungsten. The post-treatment includes a borane-containing reducing agent.Type: GrantFiled: January 19, 2022Date of Patent: December 12, 2023Assignee: NANYA TECHNOLOGY CORPORATIONInventors: Che-Hsien Liao, Yu-Chang Chang
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Publication number: 20230389384Abstract: An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.Type: ApplicationFiled: August 14, 2023Publication date: November 30, 2023Inventors: Warren S. Rieutort-Louis, Abbas Jamshidi Roudbari, Yuchi Che, Tsung-Ting Tsai, Jiun-Jye Chang, Shih Chang Chang, Ting-Kuo Chang
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Publication number: 20230387203Abstract: Depositing gallium nitride and carbon (GaN:C) (e.g., in the form of composite layers) when forming a gallium nitride drain of a transistor provides a buffer between the gallium nitride of the drain and silicon of a substrate in which the drain is formed. As a result, gaps and other defects caused by lattice mismatch are reduced, which improves electrical performance of the drain. Additionally, current leakage into the substrate is reduced, which further improves electrical performance of the drain. Additionally, or alternatively, implanting silicon in an aluminum nitride (AlN) liner for a gallium nitride drain reduces contact resistance at an interface between the gallium nitride and the silicon. As a result, electrical performance of the transistor is improved.Type: ApplicationFiled: May 31, 2022Publication date: November 30, 2023Inventors: Chi-Ming CHEN, Kuei-Ming CHEN, Yung-Chang CHANG
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Publication number: 20230378337Abstract: A p-GaN high-electron-mobility transistor, includes a substrate, a channel layer stacked on the substrate, a supply layer stacked on the channel layer, a first doped layer stacked on the supply layer, a second doped layer stacked on the first doped layer, and a third doped layer stacked on the second doped layer. A doping concentration of the first doped layer and the doping concentration of the third doped layer are lower than a doping concentration of the second doped layer. A gate is located on the third doped layer, and a source and a drain are electrically connected to the channel layer and the supply layer, respectively.Type: ApplicationFiled: July 19, 2022Publication date: November 23, 2023Inventors: TING-CHANG CHANG, MAO-CHOU TAI, YU-XUAN WANG, WEI-CHEN HUANG, TING-TZU KUO, KAI-CHUN CHANG, SHIH-KAI LIN
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Publication number: 20230377745Abstract: A method of establishing a clinical decision support system for SPC risk evaluation among patients with colorectal cancer includes combining cancer characteristics into a characteristic assembly of SPC risk evaluation; obtaining clinical data of first participants to establish a database of SPC risk evaluation; entering the database into a machine learning algorithm; using the machine learning algorithms to establish a SPC risk evaluation model; using a characteristic interpreter to analyze the model; calculating a risk value of each cancer characteristic; presenting the risk values in graphics to establish a clinical decision support system; obtaining clinical data of second participants and inputting same into the clinical decision support system; using the machine learning algorithm for comparison and analysis; predicting risk for SPC; calculating a risk value of each cancer characteristic; presenting the risk values on the clinical decision support system; giving suggestions of decreasing risk; and monitoType: ApplicationFiled: May 17, 2022Publication date: November 23, 2023Applicant: Chung Shan Medical UniversityInventors: Chi-Chang Chang, Chi-Jie Lu, Yi-Ju Tseng, Ssu-Han Chen, Chin-Jen Tseng
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Publication number: 20230369377Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.Type: ApplicationFiled: July 19, 2023Publication date: November 16, 2023Inventors: Po-Chun Liu, Yung-Chang Chang, Eugene I-Chun Chen
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Patent number: 11818912Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.Type: GrantFiled: October 31, 2019Date of Patent: November 14, 2023Assignee: Apple Inc.Inventors: Tsung-Ting Tsai, Abbas Jamshidi Roudbari, Chuan-Sheng Wei, HanChi Ting, Jae Won Choi, Jianhong Lin, Nai-Chih Kao, Shih Chang Chang, Shin-Hung Yeh, Takahide Ishii, Ting-Kuo Chang, Yu Hung Chen, Yu-Wen Liu, Yu-Chuan Pai, Andrew Lin
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Patent number: 11810516Abstract: An electronic device such as a head-mounted device may have displays. The display may have regions of lower and higher resolution to reduce data bandwidth and power consumption for the display while preserving satisfactory image quality. Data lines may be shared by lower and higher resolution portions of a display or different portions of a display with different resolutions may be supplied with different numbers of data lines. Data line length may be varied in transition regions between lower resolution and higher resolution portions of a display to reduce visible discontinuities between the lower and higher resolution portions. The lower and higher resolution portions of the display may be dynamically adjusted using dynamically adjustable gate driver circuitry and dynamically adjustable data line driver circuitry.Type: GrantFiled: January 15, 2021Date of Patent: November 7, 2023Assignee: Apple Inc.Inventors: Cheng Chen, Jason C. Sauers, Fletcher R. Rothkopf, David W. Lum, Chun-Yao Huang, Enkhamgalan Dorjgotov, Graham B. Myhre, Bennett S. Wilburn, Paolo Sacchetto, Shih Chang Chang, Wonjae Choi, Cheuk Chi Lo