Abstract: Nail gel curing devices emitting ultraviolet light, as well as methods of their making and use are disclosed. The devices are useful for curing, inter alia, acrylic compositions, more particularly, acrylic nail gel compositions, and typically employ ultraviolet and/or visible light emitting diodes (“LED”) to cure such ultraviolet and/or visible light curable nail gel resins.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes an isolation structure disposed in a semiconductor substrate, where an inner perimeter of the isolation structure demarcates a device region of the semiconductor substrate. A gate is disposed over the device region, where an outer perimeter of the gate is disposed within the inner perimeter of the isolation structure. A first source/drain region is disposed in the device region and on a first side of the gate. A second source/drain region is disposed in the device region and on a second side of the gate opposite the first side. A silicide blocking structure partially covers the gate, partially covers the first source/drain region, and partially covers the isolation structure, where a first sidewall of the silicide blocking structure is disposed between first opposite sidewalls of the gate.

Abstract: A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.

Abstract: A semiconductor device includes a substrate and a gate structure over the substrate. The semiconductor device includes a source in the substrate on a first side of the gate structure. The semiconductor device further includes a drain in the substrate on a second side of the gate structure. The semiconductor device further includes a first well having a first dopant type, wherein the first well contacts at least two surfaces of the source. The semiconductor device further includes a second well having the first dopant type, wherein the second well contacts at least two surfaces of the drain. The semiconductor device further includes a deep well below the first well and below the second well, wherein the second well extends between the first well and the deep well. In some embodiments, the deep well has a second dopant type, and the second dopant type is opposite the first dopant type.

Abstract: A method of assembling a waterproof structure includes the following operations. Connect a first input/output connector of a circuit board to a first positioning fixture. A first elastic adhesive is combined with a first rigid board. An end of the first positioning fixture away from the first input/output connector is passed out of the first rigid board, and the first input/output connector and the first elastic adhesive are separated on two sides of the first rigid board. The circuit board is arranged in the casing, wherein the first positioning fixture is inserted from the first input/output opening on the first wall inside the casing, so that the first elastic adhesive adheres the first rigid board to the first wall of the casing, and the first elastic adhesive fills a spacing between the first positioning fixture and the first input/output opening.

Abstract: A temperature controlling apparatus includes a platen, a first and a second conduits, and a first and a second outlet thermal sensors. The first conduit includes a first inlet, a first outlet, and a first heater. A first fluid enters the first inlet and exits the first outlet, the first heater heats the first fluid to a first heating temperature, and the first fluid is dispensed on the platen. The second conduit includes a second inlet, a second outlet, and a second heater. A second fluid enters the second inlet and exits the second outlet, the second heater heats the second fluid to a second heating temperature, and the second fluid is dispensed on the platen. The first and the second outlet thermal sensors are respectively disposed at the first and the second outlets to sense temperatures of the first and the second fluid.

Abstract: A manufacturing method of a reflective display includes at least the following steps. A reflective display module having a display surface is provided. An adhesive is formed on the display surface of the reflective display module. A plurality of microstructures is formed on the adhesive. A cover plate is provided over the reflective display module, the microstructures, and the adhesive. The cover plate has a first surface, a second surface, and a third surface. The second surface is located between the first surface and the reflective display module, and the third surface is connected to the first surface and the second surface. The second surface of the cover plate is adhered to the adhesive having the microstructures thereon to bond the microstructures onto the second surface of the cover plate. A light source is disposed adjacent to the third surface of the cover plate.

Abstract: A lithography apparatus includes a wafer chuck configured to hold a wafer, a fluid source configured to contain a fluid to be applied towards the wafer during a lithography process, a dispensing nozzle positioned above the wafer chuck and in fluid communication with the fluid source, the dispensing nozzle having an adjustable cross-section, and a mechanical mechanism operable to apply a force towards an outer surface of the dispensing nozzle to change the adjustable cross-section.

Abstract: A reticle cleaning system includes a casing, a reticle holder, and a static charge reducing device. The reticle holder is in the casing and configured to hold a reticle. The static charge reducing device is above the reticle holder and includes a fluid generator, an ionizer, and a static charge sensor. The fluid generator is configured to control a humidity condition in the casing. The ionizer is configured to provide ionized air molecules to the reticle. The static charge sensor is configured to detect a static charge value on the reticle, wherein the ionizer is between the fluid generator and the static charge sensor.

Abstract: High voltage semiconductor devices are described herein. An exemplary semiconductor device includes a first doped region and a second doped region disposed in a substrate. The first doped region and the second doped region are oppositely doped and adjacently disposed in the substrate. A first isolation structure and a second isolation structure are disposed over the substrate, such that each are disposed at least partially over the first doped region. The first isolation structure is spaced apart from the second isolation structure. A resistor is disposed over a portion of the first isolation structure and electrically coupled to the first doped region. A field plate disposed over a portion of the second doped region and electrically coupled to the second doped region.

Abstract: A display device includes a thin film transistor (TFT) array substrate, an isolation structure, and a front panel laminate (FPL) structure. The TFT array substrate has pixel electrodes. The isolation structure is between the pixel electrodes to form a first resistance between adjacent pixel electrodes. The front panel laminate structure is located on the isolation structure and the pixel electrodes adhesive layer, and has a display medium layer therein.

Abstract: An electronic system includes a display device, a first host and a second host. The display device includes a network interface port for connecting to an external network, a first port, a second port, a control unit for recording information associated with a designated network bridge target, and a hub unit for controlling the signal transmission between the network interface port, the first port, the second port and the control unit. The first host is coupled to the first port and configured to activate network bridge function when set as the designated network bridge target, thereby connecting to the external network. The second host is coupled to the second port and configured to connect to the external network using the network bridge function via the second port, the hub unit and the first port.

Abstract: A photolithography method includes dispensing a first liquid toward a target layer through a nozzle at a first distance from the target layer; moving the nozzle such that the nozzle is at a second distance from the target layer, wherein the second distance is different from the first distance; dispensing a second liquid toward the target layer through the nozzle at the second distance from the target layer; and patterning the target layer after dispensing the first liquid and the second liquid.

Abstract: A method of dispensing a fluid in a semiconductor manufacturing process includes providing a substrate, positioning a nozzle above the substrate, and determining a cross-sectional shape of the nozzle. The method also includes configuring the nozzle to have the determined cross-sectional shape and applying the fluid to the substrate through the nozzle with the determined cross-sectional shape.

Abstract: A wire retracting device includes a base having a platform, a limiting board disposed on the base, a cover including a top surface and a side wall, a slide block slidably disposed on a sliding area, and a transmission wire disposed in an accommodating space formed between the cover and the base. An annular wall is arranged on the platform, and has a limiting portion that has a first stop portion and a second stop portion respectively formed on two sides thereof. A gap, in which the cover is limited to being movable, is formed between the limiting board and the platform. The top surface has a grooved opening, and a lever is arranged on an inner edge thereof. The side wall is disposed along an edge of the top surface. The sliding area is formed between the inner edge of the grooved opening and the annular wall.

Abstract: A memory circuit includes first and second circuits. The first circuit includes a DRAM array including a plurality of bit lines, and the second circuit includes a computation circuit including a sense amplifier circuit. A boundary layer is positioned between the first and second circuits, and the boundary layer includes a plurality of via structures configured to electrically connect the plurality of bit lines to the sense amplifier circuit.

Abstract: The present disclosure relates an integrated chip structure. The integrated chip structure includes a first chiplet predominantly having a first plurality of integrated chip devices coupled to a first plurality of interconnects over a first substrate. The first plurality of integrated chip devices are a first type of integrated chip device. The integrated chip structure further includes a second chiplet predominantly having a second plurality of integrated chip devices coupled to a second plurality of interconnects over a second substrate. The second plurality of integrated chip devices are a second type of integrated chip device different than the first type of integrated chip device. One or more inter-chiplet connectors are between the first and second chiplets and are configured to electrically couple the first and second chiplets. The first plurality of interconnects have a first minimum width different than a second minimum width of the second plurality of interconnects.

Abstract: A memory device including a memory array configured to store data, a sense amplifier circuit coupled to the memory array, and a read circuit coupled to the sense amplifier circuit, wherein the read circuit includes a first input that receives a read column select signal for activating the read circuit to read the data out of the memory array through the read circuit during a read operation.

Abstract: In some embodiments, an integrated circuit (IC) device includes an active semiconductor layer, a circuitry formed within the active semiconductor layer, a region including conductive layers formed above the active semiconductor layer, and a memory module formed in the region. The memory device includes a three-dimensional array of memory cells, each adapted to store a weight value, and adapted to generate at each memory cell a signal indicative of a product between the stored weight value and an input signal applied to the memory cell. The memory module is further adapted to transmit the product signals from the memory cell simultaneously in the direction of the active semiconductor layer.

Abstract: A device includes a multiplication unit and a configurable summing unit. The multiplication unit is configured to receive data and weights for an Nth layer, where N is a positive integer. The multiplication unit is configured to multiply the data by the weights to provide multiplication results. The configurable summing unit is configured by Nth layer values to receive an Nth layer number of inputs and perform an Nth layer number of additions, and to sum the multiplication results and provide a configurable summing unit output.