Abstract: A microscope device for observing a sample. The microscope device and the sample are located on an optical route. The microscope device includes an objective lens unit and an additional light source set. The light source set includes a circuit substrate, a battery and a light-emitting unit. The circuit substrate has a power source portion and a light source portion electrically connected to the power source portion. A connecting member and the battery are arranged at opposite sides of the power source portion. The light-emitting unit is arranged on the light source portion, and the distance between the light-emitting unit and the center axis of the optical route is greater than the radius of the objective lens unit. The battery activates the light-emitting unit to generate a light beam, and the light beam irradiates toward the center axis of the optical route.

Abstract: A first driver circuit is configured to cooperate with a second driver circuit to control a display panel, wherein the first driver circuit is configured to output display data to a first area of the display panel and the second driver circuit is configured to output display data to a second area of the display panel. A method used for the first driver circuit includes outputting at least one emission control signal to control the second area of the display panel when the second driver circuit is disabled.

Abstract: An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate and a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate from a lower surface of the conductive pillar. The semiconductor device structure also includes an upper conductive via between the conductive pillar and the interconnection structure and a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via. The conductive pillar extends across opposite sidewalls of the upper conductive via and opposite sidewalls of the lower conductive via. A top view of an entirety of the second conductive via is separated from a top view of an entirety of the protruding portion.

Abstract: A pneumatic electric nail gun includes a muzzle unit, a striking cylinder that is connected to the muzzle unit, a piston rod subunit that extends movably from the striking cylinder into the muzzle unit, an electric unit that drives movement of the piston rod subunit from a standby position to a nail-striking position for striking a nail, and a connecting unit that includes a plurality of fasteners and a plurality of buffer members. The fasteners extend through the electric unit and secure the electric unit to the muzzle unit. Each of the buffer members surrounds a respective one of the fasteners and fills a space between the respective one of the fasteners, the electric unit and the muzzle unit for shock absorption during a nail-striking process.

Abstract: A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.

Abstract: An electric power tool includes a motor, a lifter, a firing pin, an electromagnet, a driving circuit, a latch, and a controller. The lifter is driven by the motor to drive the firing pin to perform a firing action. The driving circuit provides electric current to excite the electromagnet. The latch is moved by the electromagnet from a blocking position where the latch blocks the firing pin to move in a firing direction to a non-blocking position where the latch does not block the firing pin when the electromagnet is in an excited state. The controller, during an excitement period, controls the driving circuit to provide constant current for a first time period to excite the electromagnet to the excited state, and provide pulsating current for a second time period to keep the electromagnet in the excited state.

Abstract: A lifting gear assembly for an electric nail gun that strikes a nail in a nail-striking direction includes a muzzle seat connected to the electric nail gun, a sprocket unit including two sprocket wheels spaced apart from each other and rotatably mounted in the electric nail gun, a motor unit for driving rotation of one of the sprocket wheels, and a chain unit including a roller chain trained on the sprocket wheels and a lifting gear device mounted to the roller chain. The lifting gear device includes a pushing member driven movably by the roller chain along a path having a stroke in which the pushing member moves in a pressure-generating direction opposite to the nail-striking direction. The pushing member pushes the striking pin, when moving along the first stroke, to move the striking pin from a post-striking position to a pre-striking position.

Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a lead frame and a sub-substrate disposed on the lead frame, wherein the thickness of the sub-substrate is between 0 and 0.5 ?m. The semiconductor structure also includes an epitaxial layer disposed on the sub-substrate. The epitaxial layer includes a buffer layer, a channel layer and a barrier layer. The buffer layer is disposed between the sub-substrate and the channel layer. The channel layer is disposed between the buffer layer and the barrier layer. The semiconductor structure further includes a device layer disposed on the barrier layer and an interconnector structure electrically connected to the epitaxial layer and/or the device layer by a through hole.

Abstract: The present disclosure, in some embodiments, relates to a brush cleaning apparatus. The brush cleaning apparatus includes a wafer support configured to support a wafer. The brush cleaning apparatus also includes a cleaning brush including a porous material coupled to a core material. An uppermost surface of the porous material defines a planar cleaning surface. A first nozzle is configured to apply a first cleaning liquid directly between the wafer and the planar cleaning surface of the cleaning brush.

Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.

Abstract: A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.

Abstract: Some embodiments relate to a carrier head. The carrier head includes a housing configured to enclose a wafer, wherein the housing includes a retaining ring recess configured to circumferentially surround the wafer. A retaining ring, which includes a first ring-shaped layer and a second ring-shaped layer, is disposed in the retaining ring recess. The second ring-shaped layer is disposed deeper in the retaining ring recess than the first ring-shaped layer and separates the first ring-shaped layer from a bottom of the retaining ring recess. A hardness of the second ring-shaped layer is less than a hardness of the first ring-shaped layer.

Abstract: An optical fiber routing assembly for interfacing with co-package optical (CPO) modules is disclosed. The optical fiber routing assembly includes a housing, a plurality of terminated optical fibers routed within the housing, a first set of adapters, and a second set of adapters. The first set of adapters is arranged vertically on an upper panel of the housing and facilitates connecting the plurality of terminated optical fibers to the CPO modules via terminated jumper optical fibers. The second set of adapters is arranged horizontally and configured to facilitate connecting the plurality of terminated optical fibers to one or more electronic systems. A combination of the first set of adapters and the second set of adapters facilitates communication between the CPO modules and the electronic systems. The optical fiber routing assembly provides fiber management to alleviate maintenance or heat issues associated with dense fiber routing around electronic components.

Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.

Abstract: An optical fiber routing assembly for interfacing with co-package optical (CPO) modules is disclosed. The optical fiber routing assembly includes a housing, a plurality of terminated optical fibers routed within the housing, a first set of adapters, and a second set of adapters. The first set of adapters is arranged vertically on an upper panel of the housing and facilitates connecting the plurality of terminated optical fibers to the CPO modules via terminated jumper optical fibers. The second set of adapters is arranged horizontally and configured to facilitate connecting the plurality of terminated optical fibers to one or more electronic systems. A combination of the first set of adapters and the second set of adapters facilitates communication between the CPO modules and the electronic systems. The optical fiber routing assembly provides fiber management to alleviate maintenance or heat issues associated with dense fiber routing around electronic components.

Abstract: A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.

Abstract: A slurry solution for a Chemical Mechanical Polishing (CMP) process includes a wetting agent, a stripper additive that comprises at least one of: N-methyl-2-pyrrolidone (NMP), dimethyl sulfoxide (DMSO), sulfolane, and dimethylformamide (DMF), and an oxidizer additive comprising at least one of: hydrogen peroxide (H2O2), ammonium persulfate ((NH4)2S2O8), peroxymonosulfuric acid (H2SO5), ozone (O3) in de-ionized water, and sulfuric acid (H2SO4).

Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.