Patents by Inventor Chang-Sheng Lin

Chang-Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9597771
    Abstract: A carrier head includes a housing configured to enclose a wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring positioned in the retaining ring recess, the retaining ring configured to surround the wafer. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. A method of using a polishing system includes securing a wafer in a carrier head. The carrier head includes a housing enclosing the wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring in the retaining ring recess. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. The method includes pressing the wafer against a polishing pad, and moving at least one of the carrier head or the polishing pad relative to the other.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: March 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chang-Sheng Lin, Hsin-Hsien Lu
  • Patent number: 9567493
    Abstract: A method for performing a Chemical Mechanical Polishing (CMP) process includes applying a CMP slurry solution to a surface of a hardened fluid material on a substrate, the solution comprising an additive to change a bonding structure on the surface of the hardened fluid material. The method further includes polishing the surface of the hardened fluid material with a polishing head.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: February 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Yin Lin, Wen-Kuei Liu, Teng-Chun Tsai, Shen-Nan Lee, Kuo-Cheng Lien, Chang-Sheng Lin, Yu-Wei Chou
  • Patent number: 9559021
    Abstract: A wafer polishing process includes polishing a central area on the back side of a wafer, polishing a peripheral area on the back side of the wafer, buffing the central area, and buffing the peripheral area. The process can significantly reduce scratch-related wafer breakage, can correct focus spots on wafers, and can replace cleaning processes that use chemical etchants. Polishing and buffing can include polishing and buffing the bevel region. Further improvements include polishing with abrasive pads having a soft backing, polishing or buffing with pads having relatively soft abrasive particles, polishing or buffing with abrasive pads made from abrasive particles that have been sorted and selected for regularity of shape, irrigating the surface being polished or buffed with an aqueous solution that includes a friction-reducing agent, and buffing with abrasive pads having 20k or finer grit or non-abrasive pads.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shen-Nan Lee, Teng-Chun Tsai, Hsin-Hsien Lu, Chang-Sheng Lin, Kuo-Cheng Lien, Kuo-Yin Lin, Wen-Kuei Liu, Yu-Wei Chou
  • Patent number: 9478431
    Abstract: The present disclosure provides a method of manufacturing an integrated circuit device in some embodiments. In the method, a semiconductor substrate is processed through a series of operations to form a topographically variable surface over the semiconductor substrate. The topographically variable surface varies in height across the semiconductor substrate. A polymeric bottom anti-reflective coating (BARC) is provided over the topographically variable surface. Chemical mechanical polishing is performed to remove a first portion of the BARC, and etching effectuates a top-down recessing of the BARC.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Patent number: 9466501
    Abstract: Provided is a method of planarizing a semiconductor device. A dielectric layer is formed over a substrate. A plurality of openings is formed in the dielectric layer. The openings have varying distribution densities. The openings are filled with a metal material. A first chemical-mechanical-polishing (CMP) process is performed to remove portions of the metal material over the dielectric layer. Thereafter, a sacrificial layer is formed over the dielectric layer and the metal material. The sacrificial layer has a planar surface. The sacrificial layer is formed through one of: a spin-on process or a flowable chemical vapor deposition (FCVD) process. A second CMP process is then performed to remove the sacrificial layer and portions of the dielectric layer and the metal material therebelow. The second CMP process uses a slurry configured to have a substantially similar polishing selectivity between the sacrificial layer, the dielectric layer, and the metal material.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: October 11, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Hsien Lu, Chang-Sheng Lin
  • Patent number: 9448372
    Abstract: An optical coupling element, for coupling a light emitting element to a light transmission element, includes a light guide element. The light guide element has a light incident part, a total reflection surface and a light output part. The light incident path is formed at the light incident part corresponding to the light emitting element. The light reflection path is formed at the light output part corresponding to the light transmission element. The first included angle ?1 is formed between the light incident path and the total reflection surface and is not equal to 45 degrees. The light emitting element is adapted to emit a beam toward the total reflection surface along the light incident path by passing through the light guide element from the light incident part. Moreover, the beam is reflected by the total reflection surface and is outputted toward the light transmission element.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: September 20, 2016
    Assignee: Applied Optoelectronics, Inc.
    Inventors: Chao-Hung Tsai, Jian-Hong Luo, Li-Chieh Su, Chang-Sheng Lin
  • Patent number: 9415479
    Abstract: A polishing pad for polishing a substrate. The pad comprises a layer of material having an upper polishing surface and a lower surface interfacing with a proximate platen, the material comprising a mixture of a conductive polymer distributed in a structure of a dielectric polymeric material using predetermined relationships. Additional embodiments provide a pad having a layer of dielectric polymeric material with an upper polishing surface and a lower surface interfacing with a proximate platen. A first set of grooves filled with a conductive polymer extends from the upper polishing surface to the lower surface, the first set of grooves filled with a conductive polymer. A second set of shallower grooves provide for slurry flow over the upper polishing surface. The first and/or second set of grooves are provided in a predetermined pattern.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: August 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chang-Sheng Lin, Hsin-Hsien Lu
  • Publication number: 20160190023
    Abstract: A wafer polishing process includes polishing a central area on the back side of a wafer, polishing a peripheral area on the back side of the wafer, buffing the central area, and buffing the peripheral area. The process can significantly reduce scratch-related wafer breakage, can correct focus spots on wafers, and can replace cleaning processes that use chemical etchants. Polishing and buffing can include polishing and buffing the bevel region. Further improvements include polishing with abrasive pads having a soft backing, polishing or buffing with pads having relatively soft abrasive particles, polishing or buffing with abrasive pads made from abrasive particles that have been sorted and selected for regularity of shape, irrigating the surface being polished or buffed with an aqueous solution that includes a friction-reducing agent, and buffing with abrasive pads having 20k or finer grit or non-abrasive pads.
    Type: Application
    Filed: March 4, 2016
    Publication date: June 30, 2016
    Inventors: Shen-Nan Lee, Teng-Chun Tsai, Hsin-Hsien Lu, Chang-Sheng Lin, Kuo-Cheng Lien, Kuo-Yin Lin, Wen-Kuei Liu, Yu-Wei Chou
  • Publication number: 20160172209
    Abstract: An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a polymer coating, CMP to form a planar surface, then plasma etching to effectuate a planar recessing of the polymer coating. The material can be recessed together with the polymer coating, or subsequently with the recessed polymer coating providing a mask. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The polymer can be a photoresist. The polymer can be provided with suitable adhesion and uniformity for the CMP process through a two-step baking process and by exhausting the baking chamber from below the substrate.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Publication number: 20160099157
    Abstract: The present disclosure provides a method of manufacturing an integrated circuit device in some embodiments. In the method, a semiconductor substrate is processed through a series of operations to form a topographically variable surface over the semiconductor substrate. The topographically variable surface varies in height across the semiconductor substrate. A polymeric bottom anti-reflective coating (BARC) is provided over the topographically variable surface. Chemical mechanical polishing is performed to remove a first portion of the BARC, and etching effectuates a top-down recessing of the BARC.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Patent number: 9287127
    Abstract: A wafer polishing process includes polishing a central area on the back side of a wafer, polishing a peripheral area on the back side of the wafer, buffing the central area, and buffing the peripheral area. The process can significantly reduce scratch-related wafer breakage, can correct focus spots on wafers, and can replace cleaning processes that use chemical etchants. Polishing and buffing can include polishing and buffing the bevel region. Further improvements include polishing with abrasive pads having a soft backing, polishing or buffing with pads having relatively soft abrasive particles, polishing or buffing with abrasive pads made from abrasive particles that have been sorted and selected for regularity of shape, irrigating the surface being polished or buffed with an aqueous solution that includes a friction-reducing agent, and buffing with abrasive pads having 20 k or finer grit or non-abrasive pads.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shen-Nan Lee, Teng-Chun Tsai, Hsin-Hsien Lu, Chang-Sheng Lin, Kuo-Cheng Lien, Kuo-Yin Lin, Wen-Kuei Liu, Yu-Wei Chou
  • Patent number: 9236446
    Abstract: An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a bottom anti-reflective coating (BARC), baking to induce cross-linking in the BARC, CMP to remove a first portion of the BARC and form a planar surface, then plasma etching to effectuate a planar recessing of the BARC. The plasma etching can have a low selectivity between the BARC and the material being recessed, whereby the BARC and the material are recessed simultaneously. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The method can be particularly effective when an abrasive used during CMP forms ester linkages with the BARC.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: January 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Patent number: 9206918
    Abstract: A metering valve includes a valve main body consisting of a body and a cover, a sliding rod and an elastic member. The body has a positioning hole, a metering chamber, a containing space, and two sealing pads disposed on two end portions of the metering chamber. The containing space is for assembling the gas cylinder. A groove is disconnected with the positioning hole, the metering chamber and the containing space. The sliding rod has two ends, wherein a gas channel is formed from one end toward an inner of the sliding rod, the sliding rod has a flange and a through hole, the through hole under the flange is for connecting the gas channel, and the sliding rod blocks a gas from the metering chamber by cooperating with the sealing pads. The elastic member in the groove is connected to the flange and the groove.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: December 8, 2015
    Assignee: Basso Industry Corp.
    Inventors: Chang-Sheng Lin, Yao-Sheng Shen, An-Gi Liu
  • Patent number: 9193052
    Abstract: A mounting system for a gas gun, for mounting a motor, is disclosed. The mounting system includes a cylinder, a rigid carrier for carrying the motor such that the motor is disposed through the cylinder and is floatingly movable along an axis, a fixing member, fixedly arranged at an end plane of the cylinder and limited the carrier in the cylinder, and at least one elastic element embedded into the embedding hole of the carrier. The elastic element has a first buffering body extending between one side of the carrier and the fixing member for absorbing a positive vibrating energy of the motor and a second buffering body extending between the other side of the carrier and the cylinder for absorbing a negative vibrating energy of the motor. Dynamic energy generated during vibration of the motor is absorbed by the first and second buffering bodies to achieve the damping effect.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: November 24, 2015
    Assignee: Hilti Aktiengesellschaft
    Inventors: Jung-Mao Ho, Shen-Mou Wang, Chang-Sheng Lin
  • Publication number: 20150309270
    Abstract: An optical coupling element, for coupling a light emitting element to a light transmission element, includes a light guide element. The light guide element has a light incident part, a total reflection surface and a light output part. The light incident path is formed at the light incident part corresponding to the light emitting element. The light reflection path is formed at the light output part corresponding to the light transmission element. The first included angle ?1 is formed between the light incident path and the total reflection surface and is not equal to 45 degrees. The light emitting element is adapted to emit a beam toward the total reflection surface along the light incident path by passing through the light guide element from the light incident part. Moreover, the beam is reflected by the total reflection surface and is outputted toward the light transmission element.
    Type: Application
    Filed: September 10, 2014
    Publication date: October 29, 2015
    Inventors: Chao-Hung Tsai, Jian-Hong Luo, Li-Chieh Su, Chang-Sheng Lin
  • Publication number: 20150307747
    Abstract: A method for performing a Chemical Mechanical Polishing (CMP) process includes applying a CMP slurry solution to a surface of a hardened fluid material on a substrate, the solution comprising an additive to change a bonding structure on the surface of the hardened fluid material. The method further includes polishing the surface of the hardened fluid material with a polishing head.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 29, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Yin Lin, Wen-Kuei Liu, Teng-Chun Tsai, Shen-Nan Lee, Kuo-Cheng Lien, Chang-Sheng Lin, Yu-Wei Chou
  • Publication number: 20150306737
    Abstract: The present disclosure relates to a radiance decomposable CMP pad, and an associated method to refresh the CMP pad. In some embodiments, the CMP pad has a polymer layer and some macro pores disposed therein. A monomer of the polymer layer has a photoactive compound unit.
    Type: Application
    Filed: April 23, 2014
    Publication date: October 29, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chang-Sheng Lin
  • Publication number: 20150263132
    Abstract: An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a bottom anti-reflective coating (BARC), baking to induce cross-linking in the BARC, CMP to remove a first portion of the BARC and form a planar surface, then plasma etching to effectuate a planar recessing of the BARC. The plasma etching can have a low selectivity between the BARC and the material being recessed, whereby the BARC and the material are recessed simultaneously. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The method can be particularly effective when an abrasive used during CMP forms ester linkages with the BARC.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 17, 2015
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Publication number: 20150235858
    Abstract: A wafer polishing process includes polishing a central area on the back side of a wafer, polishing a peripheral area on the back side of the wafer, buffing the central area, and buffing the peripheral area. The process can significantly reduce scratch-related wafer breakage, can correct focus spots on wafers, and can replace cleaning processes that use chemical etchants. Polishing and buffing can include polishing and buffing the bevel region. Further improvements include polishing with abrasive pads having a soft backing, polishing or buffing with pads having relatively soft abrasive particles, polishing or buffing with abrasive pads made from abrasive particles that have been sorted and selected for regularity of shape, irrigating the surface being polished or buffed with an aqueous solution that includes a friction-reducing agent, and buffing with abrasive pads having 20k or finer grit or non-abrasive pads.
    Type: Application
    Filed: February 17, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shen-Nan Lee, Teng-Chun Tsai, Hsin-Hsien Lu, Chang-Sheng Lin, Kuo-Cheng Lien, Kuo-Yin Lin, Wen-Kuei Liu, Yu-Wei Chou
  • Publication number: 20150174727
    Abstract: A carrier head includes a housing configured to enclose a wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring positioned in the retaining ring recess, the retaining ring configured to surround the wafer. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. A method of using a polishing system includes securing a wafer in a carrier head. The carrier head includes a housing enclosing the wafer, wherein the housing includes a retaining ring recess. The carrier head includes a retaining ring in the retaining ring recess. The retaining ring has a hardness ranging from about 5 shore A to about 80 shore D. The method includes pressing the wafer against a polishing pad, and moving at least one of the carrier head or the polishing pad relative to the other.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Sheng LIN, Hsin-Hsien LU