Abstract: A dual liquid crystal display device includes a transmissive liquid crystal display panel; a reflective liquid crystal display panel formed on the same substrate as the transmissive liquid crystal display panel; a first light guide block disposed under the transmissive liquid crystal display panel and having dot patterns formed on a first surface thereof; a second light guide block disposed under the reflective liquid crystal display panel and having V-grooves formed on a first surface thereof and dot pattern formed on a second surface thereof; a light source disposed adjacent to the first light guide block; and a housing in which the transmissive and reflective liquid crystal display panels, the light source and the light guide blocks are seated, the housing having an opening to correspond to an image display surface of the reflective liquid crystal display panel.

Abstract: A dual liquid crystal display (LCD) device including a first LCD panel displaying an image on a first surface; a second LCD panel formed on the same substrate to display an image on a second surface; a light source disposed at an adjacent side under the first LCD panel; a light guide disposed under the first and second LCD panels and including a first light guide block corresponding to the first LCD panel and having dot patterns formed in a first surface and a second light guide block corresponding to the second LCD panel and having taper-cascade grooves formed on a first surface; and a housing settling the first and second LCD panels, the light source and the light guide and having an opening to correspond to an image display surface of the second LCD panel.

Abstract: Information storage devices and methods of manufacturing the same are provided. An information storage device includes a magnetic layer formed on an underlayer. The underlayer has at least one first region and at least one second region. The first and second regions have different crystallinity characteristics. The magnetic layer has at least one third region formed on the at least one first region and at least one fourth region formed on the at least one second region. The third and fourth regions have different magnetic anisotropic energy constants.

Abstract: The present invention provides an adhesion enhancer and a polymer composition containing the adhesion enhancer for enhancing the adhesion performance of polymer composition substrates to a primer. The adhesion enhancer of the present invention includes an alcohol, a phenol or another organic compound having a hydroxyl group of the alcohol or phenol and another functional group as supported by a porous material, or a master batch prepared by mixing a polymer with the above organic compound as supported on a porous material. The polymer composition substrate obtained by adding more than 0.5 part by weight of the adhesion enhancer based on 100 parts by weight of the polymer to a normal polymer composition shows good adhesion to a primer having an isocyanate group without a separate process of making a coarse surface of the substrate or an abrasion process using an organic solvent.

Abstract: In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance.

Abstract: An automatic defogging system of a vehicle according to an exemplary embodiment of the present invention includes: an input unit used for receiving a directly sensed window relative humidity value from a defogging sensor so as to directly sense a humidity generation degree in a window; a controller which controls operations of an air conditioning system programmed as a type of a logic that is selectively and phasedly controllable depending on the sensed relative humidity and; an output unit that is a selection mode of the air conditioning system that can be controlled by the controller. Accordingly, an automatic defogging system of a vehicle and a control method thereof automatically removes fog or frost on an inner surface of a window while maintaining comfortable conditions inside a vehicle.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the substrate, and the gate structure may include a first gate electrode on the tunnel oxide layer, an inter-gate dielectric on the first gate electrode, and a second gate electrode on the inter-gate dielectric with the inter-gate dielectric between the first and second gate electrodes. The leakage barrier oxide may be formed on sidewalls of the second gate electrode. The insulating spacer may be formed on the leakage barrier oxide with the leakage barrier oxide between the insulating spacer and the sidewalls of the second gate electrode. In addition, the insulating spacer and the leakage barrier oxide may include different materials. Related structures are also discussed.

Abstract: A method of fabricating a semiconductor device includes: forming a first polysilicon layer having a first thickness in a peripheral circuit region formed on a substrate; forming a stack structure comprising a first tunneling insulating layer, a charge trap layer, and a blocking insulating layer in a memory cell region formed on the substrate; forming a second polysilicon layer having a second thickness that is less than the first thickness on the blocking insulating layer; and forming gate electrodes by siliciding the first and second polysilicon layers.

Abstract: A method of forming a gate electrode of a semiconductor device includes forming a first polysilicon layer in a peripheral circuit region of a substrate, forming a barrier layer on the first polysilicon layer, the barrier layer providing an ohmic contact, forming a stack structure including a tunneling insulation layer, an electric charge storing layer, and a blocking insulation layer in a memory cell region of the substrate, forming a second polysilicon layer on the barrier layer and the blocking insulation layer, and siliciding the second polysilicon layer and forming a silicide gate electrode.

Abstract: A semiconductor device includes a first conductive layer on a semiconductor substrate, a dielectric layer including a high-k dielectric material on the first conductive layer, a second conductive layer including polysilicon doped with P-type impurities on the dielectric layer, and a third conductive layer including a metal on the second conductive layer. In some devices, a first gate structure is formed in a main cell region and includes a tunnel oxide layer, a floating gate, a first high-k dielectric layer, and a control gate. The control gate includes a layer of polysilicon doped with P-type impurities and a metal layer. A second gate structure is formed outside the main cell region and includes a tunnel oxide layer, a conductive layer, and a metal layer. A third gate structure is formed in a peripheral cell region and includes a tunnel oxide, a conductive layer, and a high-k dielectric layer having a width narrower than the conductive layer. Method embodiments are also disclosed.

Abstract: A method of forming a gate electrode of a semiconductor device is provided, the method including: forming a plurality of stacked structures each comprising a tunnel dielectric layer, a first silicon layer for floating gates, an intergate dielectric layer, a second silicon layer for control gates, and a mask pattern, on a semiconductor substrate in the stated order; forming a first interlayer dielectric layer between the plurality of stacked structures so that a top surface of the mask pattern is exposed; selectively removing the mask pattern of which the top surface is exposed; forming a third silicon layer in an area from which the hard disk layer was removed, and forming a silicon layer comprising the third silicon layer and the second silicon layer; recessing the first interlayer dielectric layer so that an upper portion of the silicon layer protrudes over the he first interlayer dielectric layer; and forming a metal silicide layer on the upper portion of the silicon layer.

Abstract: A dual liquid crystal display (LCD) device including a first LCD panel displaying an image on a first surface; a second LCD panel formed on the same substrate to display an image on a second surface; a light source disposed at an adjacent side under the first LCD panel; a light guide disposed under the first and second LCD panels and including a first light guide block corresponding to the first LCD panel and having dot patterns formed in a first surface and a second light guide block corresponding to the second LCD panel and having taper-cascade grooves formed on a first surface; and a housing settling the first and second LCD panels, the light source and the light guide and having an opening to correspond to an image display surface of the second LCD panel.

Abstract: A dual liquid crystal display device includes a transmissive liquid crystal display panel; a reflective liquid crystal display panel formed on the same substrate as the transmissive liquid crystal display panel; a first light guide block disposed under the transmissive liquid crystal display panel and having dot patterns formed on a first surface thereof; a second light guide block disposed under the reflective liquid crystal display panel and having V-grooves formed on a first surface thereof and dot pattern formed on a second surface thereof; a light source disposed adjacent to the first light guide block; and a housing in which the transmissive and reflective liquid crystal display panels, the light source and the light guide blocks are seated, the housing having an opening to correspond to an image display surface of the reflective liquid crystal display panel.

Abstract: Methods of forming a gate electrode can be provided by forming a trench in a substrate, conformally forming a polysilicon layer to provide a polysilicon conformal layer in the trench defining a recess surrounded by the polysilicon conformal layer, wherein the polysilicon conformal layer is formed to extend upwardly from a surface of the substrate to have a protrusion and the protrusion has a vertical outer sidewall adjacent the surface of the substrate, forming a tungsten layer in the recess to form an upper surface that includes an interface between the polysilicon conformal layer and the tungsten layer, and forming a capping layer being in direct contact with top surfaces of the polysilicon conformal layer and the tungsten layer without any intervening layers.

Abstract: In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: A gate electrode of a transistor can include an interface between a polysilicon conformal layer and a tungsten layer thereon in a trench in a substrate and a capping layer extending across the trench and covering the interface. Related methods are also disclosed.

Abstract: Information storage devices using magnetic domain wall movement, methods of operating the same, and methods of manufacturing the same are provided. An information storage device includes a first magnetic layer, a heating unit and a magnetic field applying unit. The heating unit heats a first region of the first magnetic layer. The magnetic field applying unit applies a magnetic field to the first region to form a magnetic domain. A wall of the magnetic domain is moved by a current applied to the first magnetic layer.

Abstract: Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the substrate, and the gate structure may include a first gate electrode on the tunnel oxide layer, an inter-gate dielectric on the first gate electrode, and a second gate electrode on the inter-gate dielectric with the inter-gate dielectric between the first and second gate electrodes. The leakage barrier oxide may be formed on sidewalls of the second gate electrode. The insulating spacer may be formed on the leakage barrier oxide with the leakage barrier oxide between the insulating spacer and the sidewalls of the second gate electrode. In addition, the insulating spacer and the leakage barrier oxide may include different materials. Related structures are also discussed.