Abstract: In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: Information storage devices and methods of manufacturing the same are provided. An information storage device includes a magnetic layer formed on an underlayer. The underlayer has at least one first region and at least one second region. The first and second regions have different crystallinity characteristics. The magnetic layer has at least one third region formed on the at least one first region and at least one fourth region formed on the at least one second region. The third and fourth regions have different magnetic anisotropic energy constants.

Abstract: Embodiments of the present invention include semiconductor devices that can be made with relatively low resistance, and methods of forming the semiconductor devices. A resistance reducing layer is formed between a polysilicon layer and a metal layer. As a result, an interface resistance between the polysilicon layer and the metal layer is greatly reduced and a distribution of the interface resistance is very uniform. As a result, a conductive structure including the resistance reducing layer has a greatly reduced sheet resistance to improve electrical characteristics of a semiconductor device having the conductive structure.

Abstract: Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the substrate, and the gate structure may include a first gate electrode on the tunnel oxide layer, an inter-gate dielectric on the first gate electrode, and a second gate electrode on the inter-gate dielectric with the inter-gate dielectric between the first and second gate electrodes. The leakage barrier oxide may be formed on sidewalls of the second gate electrode. The insulating spacer may be formed on the leakage barrier oxide with the leakage barrier oxide between the insulating spacer and the sidewalls of the second gate electrode. In addition, the insulating spacer and the leakage barrier oxide may include different materials. Related structures are also discussed.

Abstract: Information storage devices and methods of manufacturing the same are provided. A magnetic track of the information storage device includes a magnetic layer in which at least one magnetic domain forming region and at least one magnetic domain wall forming region are alternately disposed in a lengthwise direction. The at least one magnetic domain forming regions has a different magnetic anisotropic energy relative to the at least one magnetic domain wall forming region. An intermediate layer is formed under the magnetic layer. The intermediate layer includes at least one first material region and at least one second material region. Each of the at least one first material regions and the at least one second material regions corresponds to one of the at least one magnetic domain forming regions and the at least one magnetic domain wall forming regions.

Abstract: A Schottky diode and a memory device including the same are provided. The Schottky diode includes a first metal layer and an Nb-oxide layer formed on the first metal layer.

Abstract: Provided is an electromechanical switch and a method of manufacturing the same. The electromechanical switch includes an elastic conductive layer that moves by the application of an electric field, wherein the elastic conductive layer includes at least one layer of graphene.

Abstract: Provided are a field effect transistor, a logic circuit including the same and methods of manufacturing the same. The field effect transistor may include an ambipolar layer that includes a source region, a drain region, and a channel region between the source region and the drain region, wherein the source region, the drain region, and the channel region may be formed in a monolithic structure, a gate electrode on the channel region, and an insulating layer separating the gate electrode from the ambipolar layer, wherein the source region and the drain region have a width greater than that of the channel region in a second direction that crosses a first direction in which the source region and the drain region are connected to each other.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: Provided is a cross-point latch and a method of operating the cross-point latch. The cross-point latch includes a signal line, two control lines crossing the signal line, and unipolar switches disposed at crossing points between the signal line and the control lines.

Abstract: In a method for forming a gate in a semiconductor device, a first preliminary gate structure is formed on a substrate. The first preliminary gate structure includes a gate oxide layer, a polysilicon layer pattern and a tungsten layer pattern sequentially stacked on the substrate. A primary oxidation process is performed using oxygen radicals at a first temperature for adjusting a thickness of the gate oxide layer to form a second preliminary gate structure having tungsten oxide. The tungsten oxide is reduced to a tungsten material using a gas containing hydrogen to form a gate structure. The tungsten oxide may not be formed on the gate structure so that generation of the whiskers may be suppressed. Thus, a short between adjacent wirings may not be generated.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: Methods of forming a microelectronic device can include providing a gate dielectric layer on a channel region of a semiconductor substrate wherein the gate dielectric layer is a high-k dielectric material. A gate electrode barrier layer can be provided on the gate dielectric layer opposite the channel region of the semiconductor substrate, and a gate electrode metal layer can be provided on the gate electrode barrier layer opposite the channel region of the semiconductor substrate. The gate electrode barrier layer and the gate electrode metal layer can be formed of different materials. Moreover, the gate electrode metal layer can include a first material and the gate electrode barrier layer can include a second material, and the first material can have a lower electrical resistivity than the second material.

Abstract: An automatic defogging system of a vehicle according to an exemplary embodiment of the present invention includes: an input unit used for receiving a directly sensed window relative humidity value from a defogging sensor so as to directly sense a humidity generation degree in a window; a controller which controls operations of an air conditioning system programmed as a type of a logic that is selectively and phasedly controllable depending on the sensed relative humidity and; an output unit that is a selection mode of the air conditioning system that can be controlled by the controller. Accordingly, an automatic defogging system of a vehicle and a control method thereof automatically removes fog or frost on an inner surface of a window while maintaining comfortable conditions inside a vehicle.

Abstract: A mask supporting apparatus includes an absorption glass provided with at least one vacuum hole, a mask provided with a predetermined pattern and attached on a bottom surface of the absorption glass, and an absorption pad disposed between the absorption glass and the mask to define a space between the absorption glass and the mask. Air in the space is exhausted through the vacuum hole to securely fix the mask on the absorption glass.

Abstract: Example embodiments relate to a multilayer gate electrode, a semiconductor device having the same and methods of fabricating the same. Other example embodiments relate to a semiconductor device with a multilayer gate electrode which is relatively stable at higher temperatures, has improved resistance characteristics and improved reliability, and methods of fabricating the same. The multilayer gate electrode may include a polycrystalline semiconductor layer on the gate insulating layer and doped with conductive type impurities, an ohmic contact layer on the polycrystalline semiconductor layer and including tungsten (W1?x) and non-tungsten metal (Mx, x=about 0.01 to about 0.55), a metal barrier layer on the ohmic contact layer and a refractory metal layer on the metal barrier layer.

Abstract: The present invention provides an adhesion enhancer and a polymer composition containing the adhesion enhancer for enhancing the adhesion performance of polymer composition substrates to a primer. The adhesion enhancer of the present invention includes an alcohol, a phenol or another organic compound having a hydroxyl group of the alcohol or phenol and another functional group as supported by a porous material, or a master batch prepared by mixing a polymer with the above organic compound as supported on a porous material. The polymer composition substrate obtained by adding more than 0.5 part by weight of the adhesion enhancer based on 100 parts by weight of the polymer to a normal polymer composition shows good adhesion to a primer having an isocyanate group without a separate process of making a coarse surface of the substrate or an abrasion process using an organic solvent.

Abstract: Example embodiments of the present invention provide a semiconductor device, a gate electrode and method of manufacturing the same. Other example embodiments of the present invention provide a gate electrode with a refractory metal layer having decreased sheet resistance and increased reliability, a semiconductor device and a method of manufacturing the same. The gate electrode may be formed of a polysilicon layer, an amorphized metal barrier layer formed on the polysilicon layer and/or a refractory metal layer formed on the amorphized metal barrier layer. The polysilicon layer may have a first conductivity type. The semiconductor device may include a semiconductor substrate, a source region, a drain region, a gate insulation layer and/or the gate electrode described above. The source region and the drain region may be formed in the semiconductor substrate. The source and drain regions may have the first conductivity type.

Abstract: A method of forming an integrated circuit device can include forming a plurality of stacked cell gates in a memory cell region of a semiconductor substrate and a plurality of high-voltage transistor gates in a peripheral circuit region of the semiconductor substrate. The semiconductor substrate including both the plurality of stacked cell gates and the plurality of high-voltage transistor gates is annealed and the annealed semiconductor substrate including both the plurality of stacked cell gates and the plurality of high-voltage transistor gates is plasma oxidized.