Abstract: A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a first region of the chalcogenide element and has a first cross-sectional area. A second contact is connected to a second region of the chalcogenide element and having a second cross-sectional area. A first programmable volume of the chalcogenide material is defined in the first region of the chalcogenide element, a state of the first programmable volume being programmable according to a resistance associated with the first contact. A second programmable volume of the chalcogenide material is defined in the second region of the chalcogenide element, a state of the second programmable volume being programmable according to a second resistance associated with the second contact.

Abstract: A PRAM and method of forming the same are disclosed. In various embodiments, the PRAM includes a lower insulation layer formed on a semiconductor substrate, a phase change material pattern formed on the lower insulation layer and a heating electrode contacting the phase change material pattern. The heating electrode can be formed of a material having a positive temperature coefficient such that specific resistance of the material increases as a function of temperature.

Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.

Abstract: According to one embodiment, at least a portion of the phase change material including a first crystalline phase is converted to one of a second crystalline phase and an amorphous phase. The second crystalline phase transitions to the amorphous phase more easily than the first crystalline phase. For example the first crystalline phase may be a hexagonal closed packed structure and the first crystalline phase may be a face centered cubic structure.

Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.

Abstract: A magnetic random access memory device may include a first electrode on a substrate, a magnetic tunneling junction element electrically connected to the electrode, and a second electrode electrically connected to the first electrode through the magnetic tunneling junction element. In addition, a heat generating layer may be electrically connected in series between the first and second electrodes, and the heat generating layer may provide a relatively high resistance with respect to electrical current flow. Related methods are also discussed.

Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.

Abstract: In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.

Abstract: A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.

Abstract: Magnetic RAM cells have split sub-digit lines surrounded by cladding layers and methods of fabricating the same are provided. The magnetic RAM cells include first and second sub-digit lines formed over a semiconductor substrate. Only a bottom surface and an outer sidewall of the first sub-digit line are covered with a first cladding layer pattern. In addition, only a bottom surface and an outer sidewall of the second sub-digit line are covered with a second cladding layer pattern. The outer sidewall of the first sub-digit line is located distal from the second sub-digit line and the outer sidewall of the second sub-digit line is located distal the first sub-digit line. Methods of fabricating the magnetic RAM cells are also provided.

Abstract: Phase change Random Access Memory (PRAM) devices include a substrate and a phase change layer pattern on the substrate. The phase change layer pattern includes a sharp tip and at least one wall that extends from the sharp tip in a direction away from the substrate. At least one contact hole node is provided that contacts the phase change material pattern adjacent the sharp tip.

Abstract: Phase change memory devices and methods of making phase changeable memory devices including a heating electrode disposed on a substrate are provided. The heating electrode includes an electrode hole in the heating electrode. A phase change material pattern is provided in the electrode hole and contacts a sidewall of the electrode hole. In some embodiments, the electrode hole extends through the heating electrode.

Abstract: A magnetic random access memory device may include a first electrode on a substrate, a magnetic tunneling junction element electrically connected to the electrode, and a second electrode electrically connected to the first electrode through the magnetic tunneling junction element. In addition, a heat generating layer may be electrically connected in series between the first and second electrodes, and the heat generating layer may provide a relatively high resistance with respect to electrical current flow. Related methods are also discussed.

Abstract: An apparatus and method for wet pre-treatment of an effluent gas derived from upstream semiconductor or LCD manufacturing tools before the effluent gas is processed in an effluent gas treatment system in provided. The apparatus comprises an atomizing spray nozzle for atomizing a reagent and a processing section in which the effluent gas in pre-treated with the atomized reagent using a cyclone method. The processing section comprises an inner tubular portion and an outer tubular portion. The processing section has an effluent gas inlet, a reagent inlet, an effluent gas outlet, and a waste liquid outlet. An apparatus is also provided which includes a plurality of wet pre-treatment units, each of which pre-treat each of effluent gas streams derived from a plurality of CVD chambers.

Abstract: Disclosed is a process for depositing an aluminum oxide thin film necessary for semiconductor devices. The process includes the steps of: subjecting a gaseous organoaluminum compound as an aluminum source in contact with a target substrate and depositing aluminum using plasma. The steps are sequentially repeated to form an aluminum thin film, and further includes the step of oxidizing the aluminum thin film using oxygen plasma. This deposition cycle is repeated to obtain an aluminum oxide thin film. The present invention uses an aluminum source containing less contaminant compared to the prior art, thus obtaining aluminum oxide of high quality. Furthermore, the temperature of the gas supply and the reactor can be lowered in relation to the prior art method to reduce costs in the fabrication of semiconductor devices.

Abstract: Disclosed is a process for depositing an aluminum oxide thin film necessary for semiconductor devices. The process includes the steps of: subjecting a gaseous organoaluminum compound as an aluminum source in contact with a target substrate and depositing aluminum using plasma, which steps are sequentially repeated to form an aluminum thin film, and further the step of oxidizing the aluminum thin film using oxygen plasma. This deposition cycle is repeated to obtain an aluminum oxide thin film.