Abstract: A relaxed silicon germanium structure comprises a silicon buffer layer produced using a chemical vapor deposition process with an operational pressure greater than approximately 1 torr. The relaxed silicon germanium structure further comprises a silicon germanium layer deposited over the silicon buffer layer. The silicon germanium layer has less than about 107 threading dislocations per square centimeter. By depositing the silicon buffer layer at a reduced deposition rate, the overlying silicon germanium layer can be provided with a “crosshatch free” surface.

Abstract: A method of developing a polymeric film without the need for a water rinse step. An object having a surface supporting a polymeric film is placed onto a support region within a pressure chamber. A fluid and developer is introduced into the pressure chamber and the object is processed at supercritical conditions to develop the polymeric film such that the polymeric film is not substantially deformed. The pressure chamber is then vented.

Abstract: A method for blanket depositing a SiGe film comprises intermixing a silicon source, a germanium source and an etchant to form a gaseous precursor mixture. The method further comprises flowing the gaseous precursor mixture over a substrate under chemical vapor deposition conditions to deposit a blanket layer of epitaxial SiGe onto the substrate, whether patterned or un-patterned.

Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.

Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.

Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.

Abstract: An in-situ method for synthesis of a vapor type of copper or other metal precursor from a solid source of metal in an oxidation state of 1 or greater The solid source is localized above the wafer and its temperature is controlled independently from the wafer temperature. The solid source may be located, for example, in a showerhead. A metal precursor vapor is produced, and this vapor is drawn onto the wafer, allowing deposition to occur on the wafer and a solid thin metal film to form on the wafer. The invention overcomes the problem of low partial pressure of copper precursors in copper CVD.

Abstract: A method of producing a thick metal film on a substrate surface with a substantially smooth surface morphology and low resistivity. A substrate is exposed to a plasma. A first thin metal film is deposited on the substrate by chemical vapor deposition. The substrate with the film deposited thereon is exposed to a plasma, and a second thin metal film is deposited on top of the first film. The substrate may undergo subsequent cycles of plasma exposure and film deposition until a desired film thickness is obtained. The resulting film has a smooth surface morphology and low resistivity.

Abstract: A method of eliminating an edge effect in chemical vapor deposition of a metal such as copper on a semiconductor substrate surface. A susceptor in a reaction chamber is exposed to a plasma. A substrate contained thereon and processed by chemical vapor deposition has a uniform metal layer at edge and non-edge surfaces. A plurality of substrates may be processed before reexposing the susceptor to the plasma.

Abstract: Titanium is deposited onto a semiconductor interconnect to form a salicide structure by plasma-enhanced chemical vapor deposition. The reactant gases, including titanium tetrachloride, hydrogen and optionally argon, are combined. A plasma is created using RF energy and the plasma contacts the rotating semiconductor material. This causes titanium to be deposited which reacts with exposed silicon to form titanium silicide without any subsequent anneal. Other titanium deposited on the surface, as well as titanium-rich silicon compositions (TiSi.sub.X wherein X is <2), are removed by chemical etching. If only about 40 .ANG. of titanium is deposited, it will selectively deposit onto the silicon structure without coating the oxide spacers of the interconnect. In this embodiment the need to chemically etch the substrate is eliminated.

Abstract: A heating floor or plate for heating an object such as a substrate placed on its surface. A plate is provided whose surface temperature can be accurately adjusted so that the heat quantity supplied by two surface zones of the plate can be different even if the zones are small and contiguous. The plate has n zones, each having placed therein an electrically conducting heating element. n+1 sensors are used to measure the temperature of the plate, where n is an integer greater than 1. Data output from the sensors is processed and compared with at least one reference value and the result used to regulate the intensity of the current flowing in the elements based on the comparison.

Abstract: The invention relates to a gaseous phase chemical treatment reactor for wafers. The aim of the invention is to produce a reactor in which only the face of the wafer to be treated is in fact treated. This aim is achieved with the aid of a reactor comprising at least one treatment chamber (19) located within a main chamber (9) and connected by one of its ends to means (17) for injecting a treatment gas onto a wafer (1) and by its other end to a means (15) for securing said wafer, in that the latter is gripped between a heating susceptor or base (13) and the retaining means (15) in such a way as to seal said treatment chamber (19) and maintain within the latter a pressure below that of the main chamber (9). The invention more particularly relates to reactors for depositing tungsten on silicon wafers.