Abstract: A method of making a transistor device having silicided source/drain is provided. A gate electrode is formed on a substrate with a gate dielectric layer therebetween. A spacer is formed on sidewalls of the gate electrode. A source/drain is implanted into the substrate. A pre-amorphization implant (PAI) is performed to form an amorphized layer on the source/drain. A post-PAI annealing process is performed to repair defects formed during the PAI process. A metal silicide layer is then formed from the amorphized layer.

Abstract: A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.

Abstract: A method of fabricating a strained silicon transistor is provided. Amorphous silicon is formed below the transistor region before the transistor is formed. By using the tensile/compressive strainer, amorphous silicon is recrystallized to form a strained silicon layer. In addition, the dopants in the well can be driven in and activated by using the same annealing process with the amorphous silicon recrystallization.

Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a refractory metal alloy layer over a silicon-containing conductive layer. The refractory metal alloy layer is constituted of a first refractory metal and a second refractory metal. Thereafter, a cap layer is formed on the refractory metal alloy layer. A thermal process is performed so that the refractory metal alloy layer reacts with silicon of the silicon-containing conductive layer to form a refractory metal alloy salicide layer. Afterwards, an etch process with an etch solution is performed to removes the cap layer and the refractory metal alloy layer which has not been reacted and to form a protection layer on the refractory metal alloy salicide layer.

Abstract: A semiconductor device having nickel silicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed there under. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.

Abstract: The invention provides a method for forming a metal silicide layer. The method comprises steps of providing a substrate and forming a nickel-noble metal layer over the substrate. A grain boundary sealing layer is formed on the nickel-noble metal layer and then an oxygen diffusion barrier layer is formed on the grain boundary sealing layer. Thereafter, a rapid thermal process is performed to transform a portion of the nickel-noble metal layer into a metal silicide layer. Finally, the oxygen diffusion barrier layer, the grain boundary sealing layer and the rest portion of the nickel-noble metal layer are removed.

Abstract: A method for forming a plug structure by utilizing a punching through process and the related plug structure are provided. An opening is defined in a substrate, and an unwanted oxide residue is disposed on a bottom of the opening. A glue layer is subsequently formed over the substrate. Portions of the glue layer are disposed on the sidewall and bottom of the opening, and cover the oxide. Thereafter, the portion of the first glue layer disposed at the bottom of the opening is punched through until the substrate is exposed so as to remove the oxide. Next, the opening is filled with a conductive structure.

Abstract: A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.

Abstract: A method for fabricating a silicon nitride gap-filling layer is provided. A pre-multi-step formation process is performed to form a stacked layer constituting as a dense film on a substrate. Then, a post-single step deposition process is conducted to form a cap layer constituting as a sparse film on the stacked layer, wherein the cap layer has a thickness of at least 10% of the total film thickness.

Abstract: A semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.

Abstract: A method of removing material layer is disclosed. First, a semiconductor substrate is fixed on a rotating platform, where a remnant material layer is included on the surface of the semiconductor substrate. Afterward, an etching process is carried out. In the etching process, the rotating platform is rotated, and an etching solution is sprayed from a center region and a side region of the rotating platform toward the semiconductor substrate until the material layer is removed. Since the semiconductor substrate is etched by the etching solution sprayed from both the center region and the side region of the rotating platform, the etching uniformity of the semiconductor substrate is improved.

Abstract: The present invention provides a method of fabricating strained silicon channel MOS transistor, comprising providing a substrate, forming at least a gate structure on the substrate, forming a mask layer on the gate structure, performing an etching process to form two recesses corresponding to the gate structure within the substrate, performing a selective epitaxial growth (SEG) process to form an epitaxial layer in the recesses respectively, and performing an ion implantation process for the epitaxial layers to form a source/drain region.

Abstract: A silicidation process for a MOS transistor and a resulting transistor structure are described. The MOS transistor includes a silicon substrate, a gate dielectric layer, a silicon gate, a cap layer on the silicon gate, a spacer on the sidewalls of the silicon gate and the cap layer, and S/D regions in the substrate beside the silicon gate. The process includes forming a metal silicide layer on the S/D regions, utilizing plasma of a reactive gas to react a surface layer of the metal silicide layer into a passivation layer, removing the cap layer and then reacting the silicon gate into a fully silicided gate.

Abstract: The invention provides a method for forming a metal silicide layer. The method comprises steps of providing a substrate and forming a nickel-noble metal layer over the substrate. A grain boundary sealing layer is formed on the nickel-noble metal layer and then an oxygen diffusion barrier layer is formed on the grain boundary sealing layer. Thereafter, a rapid thermal process is performed to transform a portion of the nickel-noble metal layer into a metal silicide layer. Finally, the oxygen diffusion barrier layer, the grain boundary sealing layer and the rest portion of the nickel-noble metal layer are removed.

Abstract: A method for cleaning suicide includes providing a substrate having at least an intergraded silicide and residues, sequentially performing an ammonia hydrogen peroxide (APM) mixture cleaning process and a vaporized hydrochloric acid-hydrogen peroxide mixture (HPM) cleaning process to remove the residues, and performing a sulfuric acid-hydrogen peroxide mixture (SPM) cleaning process to remove residuals of the vaporized HPM cleaning process.

Abstract: The present invention provides a method of fabricating strained silicon channel MOS transistor, comprising providing a substrate, forming at least a gate structure on the substrate, forming a mask layer on the gate structure, performing an etching process to form two recesses corresponding to the gate structure within the substrate, performing a selective epitaxial growth (SEG) process to form an epitaxial layer in the recesses respectively, and performing an ion implantation process for the epitaxial layers to form a source/drain region.

Abstract: A method of fabricating semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.

Abstract: A method of stripping a remnant metal is disclosed. The remnant metal is formed on a transitional silicide of a silicon substrate. Firstly, a surface oxidation process is performed on the transitional silicide, so as to form a protective layer on the transitional silicide. Then, a HPM stripping process is performed on the silicon substrate in order to strip the remnant metal.

Abstract: A semiconductor device having nickel silicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed thereunder. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.