Abstract: A method for making UBM (Under Bump Metallurgy) pads and bumps on a wafer is disclosed. Openings are formed in a photoresist layer for forming bumps, a positive liquid photoresist is provided into the openings of the photoresist layer for forming bumps. The positive liquid photoresist is exposed and developed to modify the openings of the photoresist layer. Thus, bumps formed in the modified openings have precise bonding areas on the UBM layer. Using the bumps as a mask, UBM pads under the bumps are formed by etching the UBM layer, so that the reflowed bumps have a uniform height.

Abstract: A formation method and structure of conductive bump are provided. A conductive bump is formed on a wafer through an under bump metallurgy layer. A nickel-based wetting layer in the under bump metallurgy layer is applied on the conductive bump to prevent stannum in the conductive bump from diffusing downwards.

Abstract: A method of forming bumps on the active surface of a silicon wafer. A first under-bump metallic layer is formed over the active surface of the wafer. A second under-bump metallic layer is formed over the first under-bump metallic layer. A portion of the second under-bump metallic layer is removed to expose the first under-bump metallic layer. A plurality of solder bumps is implanted onto the second under-bump metallic layer. The exposed first under-bump metallic layer is removed so that only the first under-bump metallic layer underneath the second under-bump metallic layer remains.

Abstract: A bump fabrication process for forming a bump over a wafer having a plurality of bonding pads thereon is provided. A patterned solder mask layer having a plurality of openings that exposes the respective bonding pads is formed over a wafer. The area of the opening in a the cross-sectional area through a the bottom-section as well as through a the top-section of the opening is smaller than the area of the opening in a the cross-sectional area through a the mid-section of the opening. Solder material is deposited into the opening and then a reflow process is conducted fusing the solder material together to form a spherical bump inside the opening. Finally, the solder mask layer is removed. In addition, a pre-formed bump may form on the bonding pad of the wafer prior to forming the patterned solder mask layer over the wafer having at least with an opening that exposes the pre-formed bump.

Abstract: A semiconductor device with a capability can prevent a burnt fuse pad from re-electrical connection, wherein the semiconductor device includes a bump pad and a fuse pad over a wafer. The fuse pad includes the burnt fuse pad having a gap for electrical isolation. The semiconductor device comprises a dielectric layer, disposed substantially above the burnt fuse pad and filling the gap, and a bump structure, disposed on the bump pad. The foregoing semiconductor device can further comprise a passivation layer, which exposes the bump pad and a portion of the burnt fuse pad. Wherein, the dielectric layer is over the passivation layer, covers the exposed portion of the burnt fuse pad and fills the gap.

Abstract: A wafer-level package structure, applicable to a flip-chip type arrangement on a carrier having a plurality of contact points is described. This wafer-level package structure comprises a chip having a protective layer and a plurality of bonding pads and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The wafer-level package structure can further include a heat sink to enhance the heat dissipation ability of the package structure.

Abstract: A wafer bumping process is disclosed. A wafer having a plurality of bonding pads formed thereon is provided. A first under bump metallurgy layer is formed to cover the bonding pads. A first patterned photoresist layer having a plurality of first openings is formed on the first under bump metallurgy layer, wherein a portion of the first under bump metallurgy layer is exposed within the first openings. A second under bump metallurgy layer is formed within the first openings, wherein the second under bump metallurgy layer is much thicker than the first under bump metallurgy layer. A second patterned photoresist layer having a plurality of second openings is formed on the first patterned photoresist layer, wherein the second openings being larger than the first openings.

Abstract: A method of modifying the tin to lead ratio of a tin-lead bump forms a patterned solder mask over a substrate that comprises a first tin-lead bump formed thereon, the patterned solder mask having an opening that exposes the tin-lead bump. A solder material including tin and lead is filled in the opening of the solder mask over the first tin-lead bump. The solder material has a tin to lead ratio that differs from that of the first tin-lead bump. The solder material is reflowed to fuse with the first tin-lead bump, which forms a second tin-lead bump. The tin to lead ratio of the second tin-lead bump is thereby different from that of the first tin-lead bump.

Abstract: A method of forming a bump on an active surface of a wafer is disclosed. The method of the invention forms an under ball metallurgy (UBM) onto the active surface of the wafer. Then, the UBM is partially removed until a portion of the active surface of the wafer is exposed. At least one conductive stud is bonded onto the non-removed UBM by wire bonding.

Abstract: A redistribution process is described. A wafer is provided, wherein a first titanium layer, a first copper layer and a second titanium are sequentially formed over the surface of the wafer. The second titanium layer, the first copper layer and the first titanium layer are then defined to form a patterned trace layer. A patterned benzocyclobutene layer is then formed to expose the second titanium layer. The exposed second titanium layer is further removed to expose the first copper layer. Thereafter, a plurality of contacts is formed over the patterned benzocyclobutene layer and to connect with the first copper layer. Further, the wafer comprises a plurality of bonding pads, wherein each bonding pad is connected with each contact through the patterned trace layer.

Abstract: A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.

Abstract: A chip structure with bumps comprising: a chip and at least a bump. The chip has an active surface and at least a bonding pad that is formed on the active surface. The bump is disposed on the bonding pad, and the bump comprises a medium layer, a bump body and a bump body passivation layer. The medium layer whose material includes zinc is disposed on the bonding pad. The bump body whose material includes nickel is disposed on the medium layer. The bump body passivation layer whose material includes gold covers the bump body except for a portion of the bump body that connects to the medium layer.

Abstract: A bump fabrication process is provided. A substrate having a plurality of openings of various widths thereon is provided. The substrate is dipped into an electrolytic solution. A step current that increases gradually is provided to the solution to perform an electroplating operation so that the conductive material is deposited inside the openings to form bumps with uniform thickness.

Abstract: A wafer bump fabrication process is provided in the present invention. A wafer with multiple bonding pads and a passivation layer, which exposes the bonding pads, is provided. The surface of each bonding pad has an under bump metallurgy layer. A patterned photoresist layer with a plurality of opening is formed which openings expose the under bump metallurgy layer. Afterwards a curing process is performed to cure the patterned photoresist layer. Following a solder paste fill-in process is performed to fill a solder paste into the openings. A reflow process is performed to form bumps from the solder paste in the openings. The patterned photoresist layer is removed.

Abstract: A bumping process mainly comprises the steps of providing a wafer having a plurality of bonding pads, forming a patterned adhesive layer over the bonding pads, forming a barrier layer and a wetting layer on the patterned adhesive layer and the surface of the wafer, removing the barrier layer and the wetting layer not covering the patterned adhesive layer, forming a plurality of bumps on the patterned wetting layer and reflowing the bumps.

Abstract: The present invention provides a flip-chip package substrate including a plurality of stacked patterned circuit layers, a plurality of dielectric layers disposed between two neighboring patterned circuit layers and a plurality of bumps. The outmost layers of the patterned circuit layers include a plurality of first contacts and a plurality of second contacts. The bumps are connected to the corresponding first contacts. Since the bumps are formed on the substrate by low-cost implanting or printing apparatuses, the production cost of the flip chip package structure is lowered and the yield of the flip chip package process is improved.

Abstract: A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. The redistribution layer is formed over the first passivation layer and electrically connected to the bonding pad. Furthermore, the redistribution layer also extends from the bonding pad to the recess. The second passivation layer is formed over the first passivation layer and the redistribution layer. The second passivation layer also has an opening that exposes the redistribution layer above the recess. The bump passes through the opening and connects electrically with the redistribution layer above the recess.

Abstract: A method of forming bumps on the active surface of a silicon wafer. An under-ball metallic layer is formed over the active surface of the wafer. A plurality of first solder blocks is attached to the upper surface of the under-ball metallic layer. Each first solder block has an upper surface and a lower surface. The lower surface of each first solder block bonds with the under-ball metallic layer. The upper surfaces of the first solder blocks are planarized. A second solder block is attached to the upper surface of each first solder block and then a reflow operation is carried out.

Abstract: A chip structure with bumps comprising: a chip and at least a bump. The chip has an active surface and at least a bonding pad that is formed on the active surface. The bump is disposed on the bonding pad, and the bump comprises a medium layer, a bump body and a bump body passivation layer. The medium layer whose material includes zinc is disposed on the bonding pad. The bump body whose material includes nickel is disposed on the medium layer. The bump body passivation layer whose material includes gold covers the bump body except for a portion of the bump body that connects to the medium layer.

Abstract: A method of forming a plurality of bumps over a wafer mainly comprises providing the wafer having a plurality of bonding pads formed thereon, forming an under bump metallurgy (UBM) layer over the bonding pads wherein the UBM layer includes an adhesive layer, for example a titanium (Ti) layer or an aluminum (Al) layer, and at least one electrically conductive layer formed on the adhesive layer, removing the portions of the electrically conductive layer located outside the bonding pads, forming a plurality of bumps over the residual portions of the electrically conductive layer disposed above the bonding pads, etching the adhesive layer located outside the bumps, and then reflowing the bumps.