Patents by Inventor Chao-Fu Weng

Chao-Fu Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030166330
    Abstract: The present invention provides a bump fabrication process. After forming an under bump metallurgy (UBM) layer and bumps in sequence over the substrate, the under bump metallurgy layer that is not covered by the bumps is etched with an etchant. The etchant mainly comprises sulfuric acid and de-ionized water. The etchant can etch the nickel-vanadium layer of the UBM layer without damaging the bumps.
    Type: Application
    Filed: February 12, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030164395
    Abstract: A solder ball attaching process for attaching solder balls to a wafer is provided. First, an under-ball-metallurgy layer is formed on the active surface of the wafer. Patterned masking layers are sequentially formed over the active surface of the wafer. The masking layers together form a step opening structure that exposes the under-ball-metallic layer. A solder ball is placed on the uppermost masking layer and allowed to roll so that the solder ball drops into the step opening structure by gravity. A reflow process is conducted to join the solder ball and the under-ball-metallurgy layer together. Finally, various masking layers are removed to expose the solder ball on the bonding pad of the wafer.
    Type: Application
    Filed: December 30, 2002
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030166332
    Abstract: A bump fabrication method is described. The method comprises the steps of providing a wafer having an active surface and a plurality of bonding pads formed on the active surface; respectively forming an under bump metallurgy layer onto the bonding pads, wherein the under bump metallurgy layer includes at least a wetting layer having an oxidized region and positioned at a top layer of the under bump metallurgy layer; patterning a masking layer on the active surface wherein the masking layer is provided with a plurality of openings to expose the wetting layers; removing the oxidized region of the wetting layer using ionic bombardment; fully forming a flux film on the active layer, wherein at least a portion of the flux film covers onto the wetting layer; filling a solder paste into the openings; performing a re-flow process to form a plurality of bumps after the solder paste melts so that the flux film removes the oxidized region of the wetting layer; and removing the masking layer.
    Type: Application
    Filed: February 24, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030164552
    Abstract: An under-ball metallic layer on a contact pad with the junction between the under-ball metallic layer and the contact pad made from copper material. The under-ball metallic layer comprises an adhesion layer, a barrier layer and a wettable layer. The adhesion layer is formed over the contact pad and made from a material such as titanium-tungsten alloy or chromium. The barrier layer is formed over the adhesion layer and made from a material such as nickel-vanadium alloy. The wettable layer is formed over the barrier layer and made from a material such as copper, palladium or gold.
    Type: Application
    Filed: May 3, 2002
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030162321
    Abstract: A bumping process wherein a substrate is first provided with many electrical connections. Subsequently, the bumps on the bump transfer substrate are pressed onto the electrical connections of the substrate accompanying a heating process and then the bumps are transferred onto the electrical connections of the substrate because the adhesion characteristic between the bumps and the electrical connections is better than that between the bumps and the release layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030162381
    Abstract: A lead-free solder bump fabrication process for producing a plurality of lead-free solder bumps over a wafer is provided. The lead-free solder bump fabrication process includes forming a lead-free pre-formed solder bump over each bonding pad on the wafer and then forming a patterned solder mask layer over the active surface of the wafer. The openings in the solder mask layer expose the respective lead-free pre-formed solder bumps on the wafer. Thereafter, lead-free solder material is deposited into the opening. The material composition of the lead-free solder material differs from the material composition of the lead-free pre-formed solder bump. A reflow process is conducted so that the lead-free pre-formed solder bump fuses with the lead-free solder material to form a lead-free solder bump. Finally, the solder mask layer is removed.
    Type: Application
    Filed: February 27, 2003
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su tao
  • Publication number: 20030160323
    Abstract: A wafer-level package structure, applicable to a flip-chip arrangement on a carrier, which comprises a plurality of contact points, is described. This wafer-level package structure is mainly formed with a chip and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The conductive layer can further be arranged at a region outside the bonding pads on the chip as a heat sink to enhance the heat dissipation ability of the package.
    Type: Application
    Filed: December 19, 2002
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030161123
    Abstract: A bonding structure for bonding two substrates by a metal stud includes a first substrate, a second substrate, at least a metal stud and an adhesive. The bonding structure includes a first substrate, a second substrate, at least a metal stud and an adhesive. The metal stud is arranged between the first substrate and the second substrate and attached to the first substrate. The adhesive is applied between the metal stud and the second substrate to electrically connect the metal stud and the second substrate.
    Type: Application
    Filed: January 16, 2003
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030162362
    Abstract: A wafer bump fabrication process is provided in the present invention. A wafer with multiple bonding pads and a passivation layer, which exposes the bonding pads, is provided. The surface of each bonding pad has an under bump metallurgy layer. A patterned photoresist layer with a plurality of opening is formed which openings expose the under bump metallurgy layer. Afterwards a baking process is performed to cure the patterned photoresist layer. Following a solder paste fill-in process is performed to fill a solder paste into the openings. A reflow process is performed to form bumps from the solder paste in the openings. The patterned photoresist layer is removed.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030162379
    Abstract: A solder ball fabrication process for forming solder balls over a wafer having an active layer is provided. A plurality of patterned solder mask layers is sequentially formed over the active surface of the wafer. Each patterned solder mask layer has at least an opening that exposes a solder ball pad on the wafer. The opening of the patterned solder mask layers further away from the solder ball pad is larger in diameter than the opening of the patterned solder mask close to the solder ball pad. Solder material is deposited into the openings and a reflow process is conducted to melt the solder material together so that a solder ball is formed over the solder ball pad.
    Type: Application
    Filed: February 12, 2003
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou
  • Publication number: 20030160335
    Abstract: A flip chip interconnection structure is formed over the active surface of a chip. The active surface of the chip includes a plurality of bonding pads. A redistribution trace layer, including at least a redistribution trace, is formed over the active surface in a manner to electrically connect to the bonding pads. A plurality of conductive posts, made of a tin-lead alloy having a tin to lead ratio greater than about 10:90, are formed on and connected to the redistribution trace structure. An insulating layer is formed over the redistribution trace layer to encompass the conductive posts. The insulating layer comprises a plurality of openings through which the conductive posts externally protrude.
    Type: Application
    Filed: January 22, 2003
    Publication date: August 28, 2003
    Inventors: HO-MING TONG, CHUN-CHI LEE, JEN-KUANG FANG, MIN-LUNG HUANG, JAU-SHOUNG CHEN, CHING-HUEI SU, CHAO-FU WENG, YUNG-CHI LEE, YU-CHEN CHOU, TSUNG-HUA WU, SU TAO
  • Publication number: 20030162380
    Abstract: A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.
    Type: Application
    Filed: February 26, 2003
    Publication date: August 28, 2003
    Inventors: HO-MING TONG, CHUN-CHI LEE, JEN-KUANG FANG, MIN-LUNG HUANG, JAU-SHOUNG CHEN, CHING-HUEI SU, CHAO-FU WENG, YUNG-CHI LEE, YU-CHEN CHOU
  • Publication number: 20030162331
    Abstract: A method for preventing burnt fuse pads from further electrical connection suitable before the formation of bumps on the wafer. A dielectric layer is formed over the active surface of the wafer covering the bump pads and the fuse pads of the wafer, wherein a central region of the fuse pads is burnt to form a gap which allows the material of the dielectric layer to fill up the gap. Afterwards, either a part of the dielectric layer is removed. and the part of the dielectric layer covering the fuse pads remainsor a part of the dielectric layer covering the bump pads is removed. Then, an under ball metallurgy layer is formed on the bump pads of the wafer so that the material of the under ball metallurgy layer does not cover the two sides of the fuse pad at the same time, or fill into the gap. As a result, the electrical isolation still remains.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 28, 2003
    Inventors: HO-MING TONG, CHUN-CHI LEE, JEN-KUANG FANG, MIN-LUNG HUANG, JAU-SHOUNG CHEN, CHING-HUEI SU, CHAO-FU WENG, YUNG-CHI LEE, YU-CHEN CHOU, TSUNG-HUA WU, SU TAO
  • Publication number: 20030160089
    Abstract: A method of modifying the tin to lead ratio of a tin-lead bump forms a patterned solder mask over a substrate that comprises a first tin-lead bump formed thereon, the patterned solder mask having an opening that exposes the tin-lead bump. A solder material including tin and lead is filled in the opening of the solder mask over the first tin-lead bump. The solder material has a tin to lead ratio that differs from that of the first tin-lead bump. The solder material is reflowed to fuse with the first tin-lead bump, which forms a second tin-lead bump. The tin to lead ratio of the second tin-lead bump is thereby different from that of the first tin-lead bump.
    Type: Application
    Filed: January 17, 2003
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030157789
    Abstract: A method of forming bumps on the active surface of a silicon wafer. A first under-ball metallic layer is formed over the active surface of the wafer. A second under-ball metallic layer is formed over the first under-ball metallic layer. A portion of the second under-ball metallic layer is removed to expose the first under-ball metallic layer. A plurality of solder blocks is implanted over the second under-ball metallic layer. A reflux operation is conducted and then the exposed first under-ball metallic layer is removed so that only the first under-ball metallic layer underneath the second under-ball metallic layer remains.
    Type: Application
    Filed: May 3, 2002
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030157791
    Abstract: A process of forming bumps on conductive pads is provided. First, an adhesion layer made of titanium, titanium-wolfram alloy or chromium is formed on the conductive pads. Subsequently, a barrier layer made of nickel-vanadium alloy is formed on the adhesion layer. Next, a wettable layer made of copper is formed on the barrier layer. Subsequently, solder material is formed on the wettable layer. Subsequently, etching processes are performed to remove the wettable layer, the barrier layer and the adhesion layer that are exposed to the outside. The wettable layer, the barrier layer and the adhesion layer remain under the solder material. Afterward, a reflow process can be selectively performed.
    Type: Application
    Filed: February 21, 2003
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030157792
    Abstract: A method of forming bumps on the active surface of a silicon wafer. A first under-bump metallic layer is formed over the active surface of the wafer. A second under-bump metallic layer is formed over the first under-bump metallic layer. A portion of the second under-bump metallic layer is removed to expose the first under-bump metallic layer. A plurality of solder bumps is implanted onto the second under-bump metallic layer. The exposed first under-bump metallic layer is removed so that only the first under-bump metallic layer underneath the second under-bump metallic layer remains.
    Type: Application
    Filed: December 26, 2002
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030155406
    Abstract: A method of forming bumps on the active surface of a silicon wafer. An under-ball metallic layer is formed over the active surface of the wafer. A plurality of first solder blocks is attached to the upper surface of the under-ball metallic layer. Each first solder block has an upper surface and a lower surface. The lower surface of each first solder block bonds with the under-ball metallic layer. The upper surfaces of the first solder blocks are planarized. A second solder block is attached to the upper surface of each first solder block and then a reflux operation is carried out.
    Type: Application
    Filed: May 3, 2002
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030157438
    Abstract: A process for forming a plurality of bumps on a wafer comprises forming a first UBM (under ball metallurgy) over an active surface of a wafer. A second UBM is formed over the first UBM. A part of the second UBM is removed to expose the first UBM. A plurality of solders are respectively formed to cover the second UBM and the first UBM not covered by the second UBM. The first UBM not covered by the second UBM and not covered by the solders is removed.
    Type: Application
    Filed: January 22, 2003
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030157790
    Abstract: A method of forming a bump on an active surface of a wafer is disclosed. The method of the invention forms an under ball metallurgy (UBM) onto the active surface of the wafer. Then, the UBM is partially removed until a portion of the active surface of the wafer is exposed. At least one conductive stud is bonded onto the non-removed UBM by wire bonding.
    Type: Application
    Filed: May 3, 2002
    Publication date: August 21, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee