Patents by Inventor Chao Lin

Chao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11979479
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: May 7, 2024
    Assignees: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Patent number: 11979180
    Abstract: A method for detecting and attenuating the impact of interference in a signal of a radio receiver with multiple tuners. The method includes providing a first input signal RF1 to a first tuner T1; simultaneously providing a second input signal RF2 to a second tuner T2; simultaneously producing a first intermediate high injection signal IFH1, by the first tuner T1, using the first input signal RF1 filtered on a first frequency fE, and a first intermediate low injection signal IFB2, by the second tuner T2, using the second input signal RF2 filtered on the first frequency fE; comparing the first intermediate high injection signal IFH1 and the first intermediate low injection signal IFB2; selecting one out of the first intermediate high injection signal IFH1 and the first intermediate low injection signal IFB2 to be decoded by the radio receiver.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 7, 2024
    Assignee: Continental Automotive Technologies GmbH
    Inventors: Chao Lin, Laurent Théry
  • Patent number: 11977422
    Abstract: Provided are a display panel, a display device, and an electronic device. The display panel comprises a panel main body. The panel main body comprises a first portion, a second portion and a bendable third portion, and the third portion is located between the first portion and the second portion. A reinforcement layer is provided on a first face of the first portion to make a stiffness of the first portion higher than a stiffness of the third portion.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 7, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Jiaxiang Wang, Binfeng Feng, Yangyang Cai, Yanli Wang, Xinqi Lin, Chao Zhang, Wei Gong
  • Publication number: 20240145163
    Abstract: A transformer includes a bobbin and a plurality of coils wound on the bobbin. The plurality of coils includes a first primary coil; a second primary coil, located above the first primary coil and electrically connected to the first primary coil; a secondary coil, located between the first primary coil and the second primary; a first auxiliary coil, located above the second primary coil; and a second auxiliary coil, located on the first auxiliary coil and electrically connected to the first auxiliary coil.
    Type: Application
    Filed: October 20, 2023
    Publication date: May 2, 2024
    Inventors: Chiao FU, Yi-Chao LIN, Yao-Zhong LIU, Jia-Tay KUO
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240144029
    Abstract: A method for training a machine learning model is described, comprising receiving, for each perturbation of a plurality of perturbations of model parameters of a starting version of the machine learning model, a change of loss of the machine learning model caused by the perturbation for a set of training data determined by feeding the set of training data to one or more perturbed versions of the machine learning model, estimating a gradient of the loss of the machine learning model with respect to the model parameters from the determined changes of loss and updating the starting version of the machine learning model to an updated version of the machine learning model by changing the model parameters in a direction for which the estimated gradient indicates a reduction of loss.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Inventors: Haozhe FENG, Tianyu PANG, Chao DU, Shuicheng YAN, Min LIN
  • Publication number: 20240137431
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Application
    Filed: January 16, 2023
    Publication date: April 25, 2024
    Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 11967601
    Abstract: A bottom-emission light-emitting diode (LED) display includes a transparent substrate, a plurality of LEDs bonded on the substrate, a packaging layer formed on the substrate to cover the LEDs, and a reflecting layer formed on the packaging layer to reflect light emitted by the plurality of LEDs. The reflecting layer has a non-smooth shape or the packaging layer has different refractivities.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 23, 2024
    Assignee: Prilit Optronics, Inc.
    Inventors: Biing-Seng Wu, Chao-Wen Wu, Chun-Bin Wen, Chien-Lin Lai, Hsing-Ying Lee
  • Publication number: 20240124307
    Abstract: The present disclosure provides a method for preparing lithium iron phosphate from ferric hydroxyphosphate, including: purifying ferrous sulfate to form a ferrous sulfate solution, adding hydrogen peroxide, phosphoric acid, an ammonium dihydrogen phosphate solution and ammonia water into the ferrous sulfate solution and then reacting to form a mixed slurry, holding the mixed slurry at a temperature for a period of time, and then washing with water and subjecting to press filtration to form ferric hydroxyphosphate precursors with different iron-phosphorus ratios; then flash drying, sintering at a high temperature, and pulverizing to obtain ferric hydroxyphosphate precursors with different iron-phosphorus ratios and different specific surface areas.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Jie Sun, Ji Yang, Yihua Wei, Zhonglin He, Jianhao He, Zhongzhu Xu, Jing Mei, Guangchun Cheng, Shuo Lin, Cheng Xu, Pingjun Lin, Menghua Yu, Bin Wang, Xiaoting Wang, Chao Liu, Yuan Yao
  • Publication number: 20240126327
    Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
  • Patent number: 11958868
    Abstract: Method of inhibiting a protein-protein interaction between Von Hippel-Lindau tumor-suppressor protein and hypoxia-inducible factor 1-alpha useful in the treatment of angiogenesis-related diseases and promoting wound healing.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: April 16, 2024
    Assignees: University of Macau, Hong Kong Baptist University
    Inventors: Chung Hang Leung, Dik Lung Ma, Ligen Lin, Guodong Li, Chung Nga Ko, Dan Li, Chao Yang
  • Patent number: 11955595
    Abstract: A ceramic-polymer film includes a polymer matrix; a plasticizer; a lithium salt; and AlxLi7-xLa3Zr1.75Ta0.25O12 where x ranges from 0.01 to 1 (LLZO), wherein the LLZO are nanoparticles with diameters that range from 20 to 2000 nm and wherein the film has an ionic conductivity of greater than 1×10?3 S/cm at room temperature. The nanocomposite film can be formed on a substrate and the concentration of LLZO nanoparticles decreases in the direction of the substrate to form a concentration gradient over the thickness of the film. The film can be employed as a non-flammable, solid-state electrolyte for lithium electrochemical cells and batteries. The LLZO serves as a barrier to dendrite growth.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 9, 2024
    Assignee: Bioenno Tech LLC
    Inventors: Zhigang Lin, Chunhu Tan, Chao Yi
  • Patent number: 11956541
    Abstract: A control method of a driving mechanism is provided, including: the driving mechanism provides a first electrical signal from a control assembly to the driving mechanism to move the movable portion into an initial position relative to the fixed portion, wherein the control assembly includes a control unit and a position sensing unit; the status signal of an inertia sensing unit is read; the control unit sends the status signal to the control unit to calculate a target position; the control unit provides a second electrical signal to the driving assembly according to the target position for driving the driving assembly; a position signal is sent from the position sensing unit to the control unit; the control unit provides a third electric signal to the driving assembly to drive the driving assembly according the position signal.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: April 9, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chen-Hsien Fan, Sung-Mao Tsai, Yueh-Lin Lee, Yu-Chiao Lo, Mao-Kuo Hsu, Ching-Chieh Huan, Yi-Chun Cheng
  • Patent number: 11957070
    Abstract: A memory cell includes a memory device, a connecting structure, an insulating layer and a selector. The connecting structure is disposed on and electrically connected to the memory device. The insulating layer covers the memory device and the connecting structure. The selector is located on and electrically connected to the memory device, where the selector is disposed on the insulating layer and connected to the connecting structure by penetrating through the insulating layer.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Ying Lee, Bo-Jiun Lin, Shao-Ming Yu, Yu-Chao Lin
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Patent number: 11947496
    Abstract: Embodiments of the present disclosure relate to a multi-node storage system and a data deduplication method thereof. The method includes determining a similarity hash value of a super block, wherein the similarity hash value indicates similarity between super blocks The method further includes comparing the similarity hash value of the super block with a feature similarity hash value of a node of the multi-node storage system to determine whether the super block matches the node and, in response to determining that the super block matches the node, allocating the super block to the node.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: April 2, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Chao Lin, Yuting Zhang
  • Patent number: 11948810
    Abstract: A vacuum apparatus includes process chambers, and a transfer chamber coupled to the process chambers. The transfer chamber includes one or more vacuum ports, thorough which a gas inside the transfer chamber is exhausted, and vent ports, from which a vent gas is supplied. The one or more vacuum ports and the vent ports are arranged such that air flows from at least one of the vent ports to the one or more vacuum ports are line-symmetric with respect to a center line of the transfer chamber.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Chao Yin, Yuling Chiu, Yu-Lung Yang, Hung-Bin Lin
  • Patent number: 11947427
    Abstract: A method, an electronic device, and a computer program product for storage management are provided. The method includes: acquiring a lock attribute record in a lock attribute record chain from a data protection network for backing up data, data protection servers of the data protection network reaching a consensus on the lock attribute record chain, the lock attribute record including a first attribute value of an attribute of a lock operation, the lock operation being used for preventing a backup of the data stored in a storage server from being tampered with; acquiring, based on the lock attribute record, a second attribute value of the attribute of the lock operation from the storage server; and generating, based on determining that the first attribute value does not match the second attribute value, an alarm indicating that the backup is tampered with. This solution can better prevent data from being tampered with.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: April 2, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Simon Yuting Zhang, Yizhou Zhou, Aaron Chao Lin