Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.

Abstract: A vertically integrated micro-bolometer includes an integrated circuit chip, an infrared sensing film, and a metal bonding layer. The integrated circuit chip includes a silicon substrate, a circuit element, and a dielectric layer disposed on the silicon substrate. The infrared sensing film includes a top absorbing layer, a sensing layer, and a bottom absorbing layer. The sensing layer is disposed between the top absorbing layer and the bottom absorbing layer. Materials of the top absorbing layer, the sensing layer, and the bottom absorbing layer are materials compatible with a semiconductor manufacturing process. The metal bonding layer connects the dielectric layer on the silicon substrate in the integrated circuit chip and the bottom absorbing layer of the infrared sensing film to form a vertically integrated micro-bolometer. In one embodiment, the infrared sensing film is divided into a central sensing film, a surrounding sensing film, and a plurality of connecting portions by a plurality of slots.

Abstract: An embodiment package comprises an integrated circuit die encapsulated in an encapsulant, a patch antenna over the integrated circuit die, and a dielectric feature disposed between the integrated circuit die and the patch antenna. The patch antenna overlaps the integrated circuit die in a top-down view. The thickness of the dielectric feature is in accordance with an operating bandwidth of the patch antenna.

Abstract: Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.

Abstract: The disclosure provides an apparatus for substrate polishing, the apparatus includes a housing member, a carrier member, and a distal force assembly. The carrier member is coupled to and disposed radially outward of the housing member. The distal force assembly disposed radially inward of an exterior portion of the carrier member and radially outward of the housing member. The distal force assembly includes a bladder seal, a seal ring in contact with the bladder seal. The seal ring has a seal ring face and one or more grooves disposed therein. The grooves include a plateau radius and a ridge radius disposed opposite the plateau radius at an intersection between the seal ring face and the grooves, wherein the plateau radius and the ridge radius are between about 0.012 to about 0.018 inches. The distal force assembly also includes a transfer ring coupled to the seal ring opposite the bladder.

Abstract: A micro-light-emitting diode (microLED) display panel includes a substrate; a plurality of microLEDs disposed and arranged in rows and columns on the substrate; a driver disposed on the substrate; a plurality of first blocking walls respectively disposed between rows of the microLEDs; and a plurality of second blocking walls respectively disposed between the microLEDs of the same row.

Abstract: The present invention provides a multi-degree-of-freedom conductor depositing system for tokamak toroidal field coil winding packs, belongs to the field of development of toroidal field superconducting coils for nuclear fusion. The multi-degree-of-freedom conductor depositing system is mounted on a winding table and distributed along the contour of the toroidal field coil. The optical proximity switches detect the position signals between the winding table and the bending unit and transmit them to an automatic control system. The multi-degree-of-freedom conductor depositing system is distributed in a spiral shape from the top to the bottom from the position of the bending unit along the direction of coil winding. The conductor is deposited onto the track drive mechanism of the multi-degree-of-freedom conductor depositing device, which has a bidirectional moving and rotating function.

Abstract: A semiconductor device and methods of manufacture are discussed herein. A device includes a first semiconductor package including a first semiconductor die encapsulated in an insulating material, a first thermal expansion resistant layer over the first semiconductor die, a bonding layer over the first thermal expansion resistant layer and the insulating material, and a second semiconductor die directly bonded to the bonding layer.

Abstract: The present disclosure provides a system for signal optimization adjustment based on different heat source information. The system includes a plurality of heat source measurers, a first system chip, a second system chip, an electrical interconnection, and a bit error risk evaluator. The first system chip includes a signal transmitter, and the second system chip includes a signal receiver. The second system chip provides an electrical characteristic state of the signal receiver, and a signal adjustment information of the signal transmitter and/or the signal receiver. The bit error risk evaluator performs a signal optimization adjustment for an electrical characteristic of the signal receiver according to the electrical characteristic state. The present disclosure further provides a method for signal optimization adjustment.

Abstract: Provided in the invention are a catalyst for preparing phosgene and a preparation method therefor, and a method for the preparation of phosgene and the comprehensive utilization of energy thereof. The preparation method comprises the following steps: 1) stirring and soaking activated carbon in a modifying solution, then adding dimethyltin dichloride and chromium oxide powders and carrying out a reaction, and then adding a nickel oxide fine powder and ultrasonically oscillating same to prepare a pre-modified activated carbon; 2) drying the pre-modified activated carbon; and 3) heating and calcinating the dried pre-modified activated carbon from step 2) to prepare the catalyst.

Abstract: A stacking structure including a first die, a second die stacked on the first die, and a third die and a fourth die disposed on the second die. The first die has a first metallization structure, and the first metallization structure includes first through die vias. The second die has a second metallization structure, and second metallization structure includes second through die vias. The first through die vias are bonded with the second through die vias, and sizes of the first through die vias are different from sizes of the second through die vias. The third and fourth dies are disposed side-by-side and are bonded with the second through die vias.

Abstract: Provided is packages and method of fabricating the same. The package includes a first die, a second die, and an inductor. The second die is bonded to the first die through a bonding structure thereof. The inductor is located in the bonding structure. The inductor includes a spiral pattern parallel to top surfaces of the first die and the second die, and the spiral pattern includes at least a turn.

Abstract: The disclosure provides a display panel, a compensation of brightness method and a displaying device. The display panel comprises an array substrate, a luminescent layer, a plurality of optical film layers and a photoelectric sensor, wherein the luminescent layer is located on one side of the array substrate, the array substrate is used for driving the luminescent layer to emit light, the optical film layers are located on a side, away from the array substrate, of the luminescent layer, light emitted by the luminescent layer forms optical waveguide on the array substrate and/or the optical film layers, and the photoelectric sensor is used for acquiring the optical waveguide to perform compensation of brightness on the light emitted by the luminescent layer according to data of the optical waveguide.

Abstract: A package structure including a bottom die, a first die, a second die, an encapsulant and a first dummy structure is provided. The first die and a second die are bonded to a first side of the bottom die. The encapsulant laterally encapsulates the first die and the second die. The first dummy structure is bonded to the first side of the bottom die, wherein a sidewall of the first dummy structure is coplanar with a first sidewall of the bottom die.

Abstract: Computer implemented methods and systems are provided that comprise, under control of one or more processors of a medical device, where the one or more processors are configured with specific executable instructions. The methods and systems include sensing circuitry configured to define a sensing channel to collect biological signals, memory configured to store program instructions, a processor configured to implement the program instructions to at least one of analyze the biological signals, manage storage of the biological signals or deliver a therapy, and communication circuitry configured to wirelessly communicate with at least one other implantable or external device, the communication circuitry configured to transition between a sleep state, a partial awake state and a fully awake state.

Abstract: The present disclosure relates to a differential pressure driven burst-pipeline emergency blocking system. The system includes a valve body with flanges on opposite axial ends, a cylindrical valve sleeve connected with the inner wall of a flange end and having a through-hole in the valve sleeve wall. The wall of the valve sleeve is in movable fit with a valve spool having a U-shaped section. The working fluid through-hole in the valve sleeve is communicated with the inner chamber of the valve body and can be closed by a cylindrical surface of the valve spool. A horizontal push rod is in movable fit with a central hole at the left end of the valve spool, and opposite ends of the horizontal push rod are in movable fit with axial orifices of left and right support seats in the valve body respectively.

Abstract: A method of encoding quantum information on one or several degrees of freedom of coherent states of photons of a baseband input optical signal, a quantum transmitter, and a computer-readable medium. The quantum transmitter comprises a modulator configured to encode quantum information on one or several degrees of freedom of coherent states of photons of a baseband input optical signal using sideband modulation of the baseband optical input signal.

Abstract: The embodiments of the application discloses a method and apparatus for pose estimation, and an electronic device. A specific implementation of the method includes: obtaining an observation information sequence corresponding to a human target part, wherein the human target part comprises at least one of the following: a head and a hand; determining an initial human joint point feature based on the observation information sequence; and performing feature interaction based on the initial human joint point feature, and estimating a human pose using an interaction feature, so as to obtain human pose information. This implementation makes the estimated human pose more accurate and realistic.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.