Patents by Inventor Chao Wen

Chao Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112665
    Abstract: An active noise control (ANC) circuit is used for generating an anti-noise signal, and has a plurality of filters including at least one first filter and at least one second filter. The at least one first filter generates at least one first filter output, wherein each of the at least one first filter has at least one non-static filter and at least one static filter connected in a series fashion. The at least one second filter generates at least one second filter output, wherein each of the at least one second filter has at least one adaptive filter. The anti-noise signal is jointly controlled by the at least one first filter output and the at least one second filter output. The at least one first filter and the at least one second filter are connected in a parallel fashion.
    Type: Application
    Filed: May 21, 2023
    Publication date: April 4, 2024
    Applicant: Airoha Technology Corp.
    Inventors: Chao-Ling Hsu, Li-Wen Chi, Shih-Kai He
  • Patent number: 11942068
    Abstract: An adaptive active noise control (ANC) system includes an ANC circuit and a control circuit. The ANC circuit generates an anti-noise signal for noise reduction, wherein the ANC circuit includes at least one adaptive filter. The control circuit receives a first input signal derived from a reference signal output by a reference microphone that picks up ambient noise, receives a second input signal derived from an error signal output by an error microphone that picks up remnant noise resulting from the noise reduction, and performs a transfer function variation detection based on the first input signal and the second input signal to control the at least one adaptive filter.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Airoha Technology Corp.
    Inventors: Chao-Ling Hsu, Li-Wen Chi
  • Patent number: 11942652
    Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: March 26, 2024
    Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
  • Publication number: 20240098818
    Abstract: A method and device for managing establishment of a communications link between an external instrument (EI) and an implantable medical device (IMD) are provided. The method stores, in a memory in at least one of the IMD or the EI, a base scanning schedule that defines a pattern for scanning windows over a scanning state. The method enters the scanning state during which a receiver scans for advertisement notices during the scanning windows. At least a portion of the scanning windows are grouped in a first segment of the scanning state. The method stores, in the memory, a scan reset pattern for restarting the scanning state. Further, the method automatically restarts the scanning state based on the scan reset pattern to form a pseudo-scanning schedule that differs from the base scanning schedule and establishes a communication session between the IMD and the EI.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Yongjian Wu, Jyoti Bhayana, Chao-Wen Young, Tejpal Singh, Samir Shah
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240085268
    Abstract: A device and method for measuring the decentration of optics under test is provided. The device comprises a rotational spindle for loading and rotating the optics under test, a light source module for providing incident light beam to the optics under test, and a wavefront sensor for receiving testing light beams with different exposures from the optics under test at a plurality of azimuthal directions.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 14, 2024
    Inventor: Chao-Wen Liang
  • Publication number: 20240088804
    Abstract: Provided is a motor braking device for a N-phase brushless motor. The motor braking device includes a switching circuit adapted to connect the N-phase brushless motor to a power supply, the switching circuit comprising a high side switch group and a low side switch group, each of the high side switch group and the low side switch group comprising N switching elements, and a control unit configured to control the switching circuit to brake the motor based on occurrence of a first event, the first event chosen from a group consisting of release of a trigger by a user, and occurrence of a predetermined condition as detected by a sensor. The control unit is configured to, upon occurrence of the first event, switch all the switching elements of one of the high side switch group or the low side switch group to an on-state, and simultaneously switch all the switching elements of the other one of the high side switch group and the lower side switch group to an off-state.
    Type: Application
    Filed: February 10, 2021
    Publication date: March 14, 2024
    Inventors: Bao An ZHANG, Zi Cong CHEN, Li Hua XIE, Chao WEN, Yong Min LI
  • Patent number: 11929041
    Abstract: A display apparatus includes a backlight module with backlight zones, a panel over the backlight module, and a circuit configured to generate compensated pixel data for the panel based on image data and an arrangement of the zones of the backlight module, in which the image data has image areas respectively corresponding to the backlight zones. For a first image area being a low-luminance image area and a luminance intensity of a first zone of the zones corresponding to the first image area being less than a luminance intensity of a second zone corresponding to a second image area neighboring the first image area, the circuit performs first pixel compensation for high-luminance pixels in the second image area and second pixel compensation on low-luminance pixels in the second image area, in which the second pixel compensation is greater than the first pixel compensation.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: March 12, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chao Chen Huang, Tsai Hsing Chen, Cheng Che Tsai, Ching-Wen Wang
  • Publication number: 20240079253
    Abstract: A transfer system adaptable to performing levelling alignment includes a transfer head that picks up micro devices, the transfer head having a plurality of pick-up heads protruded from a bottom surface of the transfer head; and a levelling fixture configured to perform levelling alignment for the transfer head, the levelling fixture having a plurality of cavities that are concave downwards to correspondingly accommodate the pick-up heads respectively.
    Type: Application
    Filed: October 31, 2023
    Publication date: March 7, 2024
    Inventors: Biing-Seng Wu, Chun-Jen Weng, Chao-Wen Wu
  • Publication number: 20240071362
    Abstract: In example implementations, a computing device is provided. The computing device includes a system management bus, a controller communicatively coupled to the system management bus, a noise generating component communicatively coupled to the controller, a noise cancellation codec communicatively coupled to the system management bus, and a speaker communicatively coupled to the noise cancellation codec. The operating parameters of the noise generating component are provided to the controller. The noise cancellation codec is to receive the operating parameters of the noise generating component from the controller via the system management bus and to generate a noise cancellation signal based on the operating parameters. The speaker outputs the noise cancellation signal to cancel noise generated by the noise generating component.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: Chao-Wen Cheng, Tsung Yen Chen, Wen Shih Chen, Mo-Hsuan Lin, Juiching Chang
  • Publication number: 20240069069
    Abstract: A probe pin cleaning pad including a foam layer, a cleaning layer, and a polishing layer is provided. The cleaning layer is disposed between the foam layer and the polishing layer. A cleaning method for a probe pin is also provided.
    Type: Application
    Filed: November 10, 2023
    Publication date: February 29, 2024
    Applicant: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Yu-Hsuen Lee, Ching-Wen Hsu, Chao-Hsuan Yang, Ting-Wei Lin
  • Patent number: 11915359
    Abstract: Systems, apparatuses, and methods for implementing kernel software driven color remapping of rendered primary surfaces are disclosed. A system includes at least a general processor, a graphics processor, and a memory. The general processor executes a user-mode application, a user-mode driver, and a kernel-mode driver. A primary surface is rendered on the graphics processor on behalf of the user-mode application. The primary surface is stored in memory locations allocated for the primary surface by the user-mode driver and the kernel-mode driver is notified when the primary surface is ready to be displayed. Rather than displaying the primary surface, the kernel-mode driver causes the pixels of the primary surface to be remapped on the graphics processor using a selected lookup table (LUT) so as to generate a remapped surface which stored in memory locations allocated for the remapped surface by the user-mode driver. Then, the remapped surface is displayed.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 27, 2024
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Jason Wen-Tse Wu, Parimalkumar Patel, Jia Hui Li, Chao Zhan
  • Patent number: 11916012
    Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih
  • Publication number: 20240055371
    Abstract: Embodiments include a crack stopper structure surrounding an embedded integrated circuit die, and the formation thereof. The crack stopper structure may include multiple layers separated by a fill layer. The layers of the crack stopper may include multiple sublayers, some of the sublayers providing adhesion, hardness buffering, and material gradients for transitioning from one layer of the crack stopper structure to another layer of the crack stopper structure.
    Type: Application
    Filed: January 9, 2023
    Publication date: February 15, 2024
    Inventors: Der-Chyang Yeh, Kuo-Chiang Ting, Yu-Hsiung Wang, Chao-Wen Shih, Sung-Feng Yeh, Ta Hao Sung, Cheng-Wei Huang, Yen-Ping Wang, Chang-Wen Huang, Sheng-Ta Lin, Li-Cheng Hu, Gao-Long Wu
  • Patent number: 11896831
    Abstract: Methods and devices for managing establishment of a communications link between an external instrument (EI) and an implantable medical device (IMD) are provided. The methods and devices comprise storing, in memory in at least one of the IMD or the EI an advertising schedule defining a pattern for advertisement notices. The advertisement notices are distributed un-evenly and separated by unequal advertisement intervals. The method transmits, from a transmitter in at least one of the IMD or the EI the advertisement notices. The advertisement notices are distributed as defined by the advertising schedule. The method establishes a communication session between the IMD and the EI.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: February 13, 2024
    Assignee: Pacesetter, Inc.
    Inventors: Yongjian Wu, Samir Shah, Heidi Hellman, Reza Shahandeh, Tejpal Singh, Youjing Huang, Chao-Wen Young
  • Publication number: 20240042892
    Abstract: Disclosed are an unlocking apparatus, a swapping device comprising same, and an unlocking control method. The unlocking apparatus is used for unlocking or locking a battery box in a battery bracket on an electric vehicle, and comprises a drive mechanism, an unlocking component, and a transmission member. The drive mechanism drives the unlocking component to move by means of the transmission member, so that the unlocking component drives a locking mechanism on the battery bracket to move to unlock or lock the battery box; the unlocking component is axially rotatable relative to the transmission member to adapt to the angle deviation between the unlocking component and the standard unlocking position on the battery bracket. The swapping device comprises the unlocking apparatus. In this way, even if there is a circumferential deviation, the unlocking component is ensured to be accurately aligned and connected.
    Type: Application
    Filed: July 6, 2021
    Publication date: February 8, 2024
    Inventors: Jianping Zhang, Yi Ji, Chao Wen, Yingfu Zhou
  • Publication number: 20240044529
    Abstract: A cooling distribution unit includes a main body, a removable unit and an adjustment mechanism. The main body includes a first guiding structure. The removable unit includes a casing, a pump and a second guiding structure. The first guiding structure and the second guiding structure are coupled with each other. The adjustment mechanism includes a guiding slot and a fulcrum part. The guiding slot has a front end and a rear end. A distance between a center of the front end of the guiding slot and the fulcrum part is greater than a distance between a center of the rear end of the guiding slot and the fulcrum part. While the removable unit is locked on the main body or detached from the main body, the first guiding structure or the second guiding structure is disposed within the guiding slot.
    Type: Application
    Filed: March 21, 2023
    Publication date: February 8, 2024
    Inventor: Chao-Wen Lu
  • Patent number: 11895829
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a substrate; forming a bit line structure over the substrate; forming a spacer surrounding the bit line structure; forming a polysilicon layer covering the bit line structure and the spacer; performing a first etching operation on the polysilicon layer to obtain a first height of the polysilicon layer, wherein the first height is less than a height of the bit line structure or a height of the spacer; performing a second etching operation on a first portion of the spacer; and performing a third etching operation on the polysilicon layer to obtain a second height of the polysilicon layer, wherein the second height is less than the first height.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: February 6, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Pei-Rou Jiang, Chao-Wen Lay
  • Patent number: 11894299
    Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR LTD
    Inventors: Chao-Wen Shih, Chen-Hua Yu, Han-Ping Pu, Hsin-Yu Pan, Hao-Yi Tsai, Sen-Kuei Hsu
  • Patent number: 11894309
    Abstract: A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Tzuan-Horng Liu, Ming-Fa Chen, Chao-Wen Shih, Sung-Feng Yeh