Abstract: A die stack structure including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a redistribution circuit structure is provided. The first semiconductor die includes a first semiconductor substrate including a first portion and a second portion, a first interconnect structure and a first bonding structure. The first interconnect structure is disposed on a top surface of the second portion, a lateral dimension of the first portion is greater than a lateral dimension of the top surface of the second portion. The second semiconductor die is disposed on the first semiconductor die and includes a second bonding structure, the second semiconductor die is electrically connected with the first semiconductor die through the first and second bonding structures. The insulating encapsulation is disposed on the first portion and laterally encapsulating the second portion and the second semiconductor die.

Abstract: A semiconductor structure includes a first semiconductor substrate, a first interconnect structure disposed below the first semiconductor substrate, a through substrate via (TSV) penetrating through the first semiconductor substrate and extending into the first interconnect structure, and a first bonding conductor disposed below the first interconnect structure and electrically coupled to the TSV through the first interconnect structure. The TSV includes a first surface in the first interconnect structure and a second surface opposite to the first surface, and the first bonding conductor includes a first bonding surface facing away the first interconnect structure. In a view, a boundary of the first bonding surface of the first bonding conductor overlaps a boundary of the first surface of the TSV.

Abstract: An auxiliary assessment method for cardiac function performed by a computing unit includes collecting a number of heartbeats and an amount of movement of a subject in a period of time; and calculating a distance per beat to assess cardiac function of the subject. The distance per beat is defined by dividing the amount of movement by the number of heartbeats. A length of the period of time is defined between at least two adjacent heartbeats. The amount of movement corresponds to a cumulative amount of movement in the period of time.

Abstract: A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.

Abstract: A heat sink includes a heat conduction portion and a heat dissipation portion. The heat conduction portion is a flat plate with two main surfaces parallel with each other and a plurality of side surfaces. One of the two main surfaces is a contacting surface contacting a heat source. The heat dissipation portion is extended outward from at least one of the plurality of side surfaces of the heat conduction portion. The heat dissipation portion includes a plurality of first branches and a plurality of second branches. Each of the first branches is a flat plate and has two opposite main surfaces and four side surfaces. The two opposite main surfaces of each of the first branches are parallel to the two main surfaces of the heat conduction portion. The second branches are extended from the first branches and parallel to the heat conduction portion.

Abstract: A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.

Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.

Abstract: Sacrificial pillars for a semiconductor device assembly, and associated methods and systems are disclosed. In one embodiment, a region of a semiconductor die may be identified to include sacrificial pillars that are not connected to bond pads of the semiconductor die, in addition to live conductive pillars connected to the bond pads. The region with the sacrificial pillars, when disposed in proximity to the live conductive pillars, may prevent an areal density of the live conductive pillars from experiencing an abrupt change that may result in intolerable variations in heights of the live conductive pillars. As such, the sacrificial pillars may improve a coplanarity of the live conductive pillars by reducing variations in the heights of the live conductive pillars. Thereafter, the sacrificial pillars may be removed from the semiconductor die.

Abstract: A bottom-emission light-emitting diode (LED) display includes a transparent substrate, a plurality of LEDs bonded on the substrate, a packaging layer formed on the substrate to cover the LEDs, and a reflecting layer formed on the packaging layer to reflect light emitted by the plurality of LEDs. The reflecting layer has a non-smooth shape or the packaging layer has different refractivities.

Abstract: Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.

Abstract: A method and device for managing establishment of a communications link between an external instrument (EI) and an implantable medical device (IMD) are provided. The method stores, in a memory in at least one of the IMD or the EI, a base scanning schedule that defines a pattern for scanning windows over a scanning state. The method enters the scanning state during which a receiver scans for advertisement notices during the scanning windows. At least a portion of the scanning windows are grouped in a first segment of the scanning state. The method stores, in the memory, a scan reset pattern for restarting the scanning state. Further, the method automatically restarts the scanning state based on the scan reset pattern to form a pseudo-scanning schedule that differs from the base scanning schedule and establishes a communication session between the IMD and the EI.

Abstract: Provided is a motor braking device for a N-phase brushless motor. The motor braking device includes a switching circuit adapted to connect the N-phase brushless motor to a power supply, the switching circuit comprising a high side switch group and a low side switch group, each of the high side switch group and the low side switch group comprising N switching elements, and a control unit configured to control the switching circuit to brake the motor based on occurrence of a first event, the first event chosen from a group consisting of release of a trigger by a user, and occurrence of a predetermined condition as detected by a sensor. The control unit is configured to, upon occurrence of the first event, switch all the switching elements of one of the high side switch group or the low side switch group to an on-state, and simultaneously switch all the switching elements of the other one of the high side switch group and the lower side switch group to an off-state.

Abstract: A device and method for measuring the decentration of optics under test is provided. The device comprises a rotational spindle for loading and rotating the optics under test, a light source module for providing incident light beam to the optics under test, and a wavefront sensor for receiving testing light beams with different exposures from the optics under test at a plurality of azimuthal directions.

Abstract: A transfer system adaptable to performing levelling alignment includes a transfer head that picks up micro devices, the transfer head having a plurality of pick-up heads protruded from a bottom surface of the transfer head; and a levelling fixture configured to perform levelling alignment for the transfer head, the levelling fixture having a plurality of cavities that are concave downwards to correspondingly accommodate the pick-up heads respectively.

Abstract: In example implementations, a computing device is provided. The computing device includes a system management bus, a controller communicatively coupled to the system management bus, a noise generating component communicatively coupled to the controller, a noise cancellation codec communicatively coupled to the system management bus, and a speaker communicatively coupled to the noise cancellation codec. The operating parameters of the noise generating component are provided to the controller. The noise cancellation codec is to receive the operating parameters of the noise generating component from the controller via the system management bus and to generate a noise cancellation signal based on the operating parameters. The speaker outputs the noise cancellation signal to cancel noise generated by the noise generating component.

Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a first device, a second device, and a processor communicatively coupled to the expansion interface. The expansion interface includes a plurality of slots. Two slots of the plurality of slots are controlled by a single reset signal. The first device is connected to a first slot of the two slots and has a feature that is compatible with the single reset signal. The second device is connected to a second slot of the two slots and does not have the feature compatible with the single reset signal. The process is to detect the first device connected to the first slot and the second device connected to the second slot and disable the feature by preventing the first slot and the second slot from receiving the single reset signal.

Abstract: Embodiments include a crack stopper structure surrounding an embedded integrated circuit die, and the formation thereof. The crack stopper structure may include multiple layers separated by a fill layer. The layers of the crack stopper may include multiple sublayers, some of the sublayers providing adhesion, hardness buffering, and material gradients for transitioning from one layer of the crack stopper structure to another layer of the crack stopper structure.