Abstract: A method, system and external instrument are provided. The method initiates a communication link between an external instrument (EI) and an implantable medical device (IMD), established a first connection interval for conveying data packets between the EI and IMD and monitors a connection criteria that includes at least one of a data throughput requirement. A battery indicator or link condition of the communications link is between the IMD and EI. The method further changes from the first connection interval to a second connection interval based on the connection criteria.

Abstract: The disclosure relates to a thin vapor-chamber structure including a first cover and a second cover. The first cover has a first surface and a first clustered pattern. The first clustered pattern is disposed on the first surface, and has a plurality of first protruding stripes spaced apart from each other and extended along a first direction. The second cover has a second surface and a second clustered pattern. The first surface faces the second surface. The second clustered pattern is disposed on the second surface, and has a plurality of second protruding stripes spaced apart from each other and extended along a second direction. The first clustered pattern and the second clustered pattern are partially contacted with each other to form a wick. The lateral walls of the first protruding stripes and the second protruding stripes form a micro-channel meandering between the first surface and the second surface.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a memory, a controller, and a configuration change module. The expansion interface includes a plurality of slots to connect to a respective add-in card and a re-timer to control an operation of the plurality of slots. The memory is to store a firmware that sets a configuration of the plurality of slots, wherein the re-timer is to control the operation of the plurality of slots in accordance with the configuration set by the firmware. The controller is to control operation of the expansion interface. The configuration change module is to change the configuration of the plurality of slots when a change in a number of connected add-in cards is detected.

Abstract: A structure including stacked substrates, a first semiconductor die, a second semiconductor die, and an insulating encapsulation is provided. The first semiconductor die is disposed over the stacked substrates. The second semiconductor die is stacked over the first semiconductor die. The insulating encapsulation includes a first encapsulation portion encapsulating the first semiconductor die and a second encapsulation portion encapsulating the second semiconductor die.

Abstract: In an embodiment, a device includes: a first integrated circuit die; a second integrated circuit die; a gap-fill dielectric between a first sidewall of the first integrated circuit die and a second sidewall of the second integrated circuit die; a protective cap overlapping the gap-fill dielectric, the first sidewall of the first integrated circuit die, and the second sidewall of the second integrated circuit die; and an isolation layer around the protective cap, the isolation layer disposed on the first integrated circuit die, and the second integrated circuit die.

Abstract: An example redundant power supply system comprises a power supply input to receive power from a power supply; a buck-boost converter coupled to the power supply input; and a controller coupled to the buck-boost converter. The controller is to receive a power supply identification signal from the power supply. The controller is also to enable or disable the buck-boost converter based on the power supply identification signal.

Abstract: A method includes etching a substrate to form an opening, depositing a first dielectric liner extending into the opening, and depositing a second dielectric liner over the first dielectric liner. The second dielectric liner extends into the opening. A conductive material is filled into the opening. The method further includes performing a first planarization process to planarize the conductive material so that a portion of the conductive material in the opening forms a through-via, performing a backside grinding process on the substrate until the through-via is revealed from a backside of the substrate, and forming a conductive feature on the backside of the substrate. The conductive feature is electrically connected to the through-via.

Abstract: An embodiment package comprises an integrated circuit die encapsulated in an encapsulant, a patch antenna over the integrated circuit die, and a dielectric feature disposed between the integrated circuit die and the patch antenna. The patch antenna overlaps the integrated circuit die in a top-down view. The thickness of the dielectric feature is in accordance with an operating bandwidth of the patch antenna.

Abstract: A method for managing power during communication with an implantable medical device, including establishing a communications link, utilizing a power corresponding to a session start power, to initiate a current session between an implantable medical device (IMD) and external device. A telemetry break condition of the communications link is monitored during the current session. The power utilized by the IMD is adjusted between low and high power levels, during the current session based on the telemetry break condition. The number of sessions is counted, including the current session and one or more prior sessions, in which the IMD utilized the higher power level, and a level for the session start power to be utilized to initiate a next session following the current session is adaptively learned based on the counting of the number of sessions.

Abstract: A package structure includes a plurality of stacked die units and an insulating encapsulant. The plurality of stacked die units is stacked on top of one another, where each of the plurality of stacked die units include a first semiconductor die, a first bonding chip. The first semiconductor die has a plurality of first bonding pads. The first bonding chip is stacked on the first semiconductor die and has a plurality of first bonding structure. The plurality of first bonding structures is bonded to the plurality of first bonding pads through hybrid bonding. The insulating encapsulant is encapsulating the plurality of stacked die units.

Abstract: A structure including stacked substrates, a first semiconductor die, a second semiconductor die, and an insulating encapsulation is provided. The first semiconductor die is disposed over the stacked substrates. The second semiconductor die is stacked over the first semiconductor die. The insulating encapsulation includes a first encapsulation portion encapsulating the first semiconductor die and a second encapsulation portion encapsulating the second semiconductor die.

Abstract: A semiconductor package includes a first die and a through via. The through via is electrically connected to the first die. The through via includes a first conductive layer having a first width, a second conductive layer having a second width different from the first width and a first seed layer disposed aside an interface between the first conductive layer and the second conductive layer.

Abstract: A manufacturing method of a semiconductor device includes forming a bitline on a semiconductor structure comprising a conductive feature therein. A spacer is formed adjacent to a sidewall of the bitline, and the spacer has a dielectric contact in a range of about 2 to about 3. A sacrificial layer is formed over the semiconductor structure and covering the spacer. A portion of the sacrificial layer over the bitline is etched to form a first trench to expose a top surface of the bitline. A dielectric layer is formed in the first trench and over the bitline. After forming the dielectric layer, a remaining portion of the sacrificial layer is removed to form a second trench over the semiconductor structure and an outer sidewall of the first spacer is exposed. A contact is formed in the second trench and connected to the conductive feature of the semiconductor structure.

Abstract: A radiative heat collective bonder or gangbonder for packaging a semiconductor die stack is provided. The bonder generally includes a shroud positioned at least partially around the die stack and a radiative heat source positioned inward of the shroud and configured to emit a radiative heat flux in a direction away from the shroud. The bonder may further include a bondhead configured to contact the backside of the topmost die in the die stack and optionally include another bondhead configured to contact a substrate beneath the die stack. The radiative heat source may be configured to direct the radiative heat flux to at least a portion of the die stack to reduce a vertical temperature gradient in the die stack. One or both of the bondheads may be configured to concurrently direct a conductive heat flux into the die stack.

Abstract: This disclosure is directed to a ball valve having an outer valve body, a valve core, a rotational assembly, and a functional assembly. The valve core is accommodated in the outer valve body, and the valve core has a flow channel defined therein. The rotational assembly is connected to the valve core for turning the valve core. A portion of the functional assembly is disposed in the flow channel.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface that includes a plurality of slots. A first add-in card is connected to a first slot of the plurality of slots. A second add-in card is connected to a second slot of the plurality of slots. The computing device includes a processor communicatively coupled to the expansion interface. The processor is to detect that the first add-in card is compatible with a power savings control signal and that the second add-in card is not compatible with the power savings control signal, disable the power savings control signal to the second slot, and transmit the power savings control signal to the first slot when the first add-in card goes into a power savings mode.

Abstract: A micro-light-emitting diode (microLED) display panel includes a plurality of microLEDs arranged in rows and columns. Anodes of microLEDs in a same row are connected to a corresponding data line, and cathodes of pixels in a same column are connected to a corresponding group of common lines, each of which is connected to cathodes of microLEDs of different colors.

Abstract: A package structure includes a plurality of stacked die units and an insulating encapsulant. The plurality of stacked die units is stacked on top of one another, where each of the plurality of stacked die units include a first semiconductor die, a first bonding chip. The first semiconductor die has a plurality of first bonding pads. The first bonding chip is stacked on the first semiconductor die and has a plurality of first bonding structure. The plurality of first bonding structures is bonded to the plurality of first bonding pads through hybrid bonding. The insulating encapsulant is encapsulating the plurality of stacked die units.

Abstract: A package structure is provided. The package structure includes a dielectric structure and an antenna structure disposed in the dielectric structure. The package structure also includes a semiconductor device disposed on the dielectric structure and a protective layer surrounding the semiconductor device. The package structure further includes a conductive feature electrically connecting the semiconductor device and the antenna structure. A portion of the antenna structure is between the conductive feature and the dielectric structure.

Abstract: The present disclosure relates to a circuit and a method for compensating output of voltage source, and the voltage source. The circuit (20) for compensating an output (Vo) of a voltage source, comprises: a sensing unit (202), a first adjustment unit (102), an amplifier unit (205), and a second adjustment unit (101). The first adjustment unit (102) is coupled in parallel with the sensing unit (202), and configured to generate at least one pole point and/or at least one zero point in a transfer function of the circuit (20); the second adjustment unit (101) is configured to generate at least one zero point in the transfer function of the circuit (20). Therefore, the first adjustment unit, and the second adjustment unit are arranged for generating adjustable zero points and pole points in the transfer function of the voltage source, so as to obtain a higher loop bandwidth.