Patents by Inventor Chao Wen

Chao Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190383566
    Abstract: A heat sink includes a heat conduction portion and a heat dissipation portion. The heat conduction portion contacts a heat source with a flat form. The heat dissipation portion is extended outward from at least one side of the thickness of the heat conduction portion and parallel to the heat conduction portion. The heat dissipation portion includes at least a first branch extended from the heat conduction portion and at least a second branch extended from the first branch.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Inventor: Chao-Wen LU
  • Publication number: 20190386176
    Abstract: A support structure for a light-emitting diode utilizes the configuration of a sacrifice structure to achieve safe separation of a light-emitting diode from a carrier substrate. Specifically, when an external force is applied on the light-emitting diode or the carrier substrate, a breaking layer of the sacrifice structure is the first layer to be broken, so that the light-emitting diode and carrier substrate will become separated from each other.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 19, 2019
    Inventors: BIING-SENG WU, CHAO-WEN WU, CHUN-JEN WENG
  • Patent number: 10510693
    Abstract: A semiconductor package structure including an encapsulation body, an RFIC chip, a first antenna structure, and a second antenna structure is provided. The RFIC chip may be embedded in the encapsulation body. The first antenna structure may be disposed at a lateral side of the RFIC chip, electrically connected to the RFIC chip, and include a first conductor layer and a plurality of first patches opposite to the first conductor layer. The second antenna structure may be stacked on the RFIC chip, electrically connected to the RFIC chip, and include a second conductor layer and a plurality of second patches opposite to the second conductor layer. The first patches and the second patches are located at a surface of the encapsulation body. A first distance between the first conductor layer and the first patches is different from a second distance between the second conductor layer and the second patches.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chiang Wu, Chun-Lin Lu, Chao-Wen Shih, Han-Ping Pu, Nan-Chin Chuang
  • Patent number: 10510652
    Abstract: A method of manufacturing a semiconductor device includes: receiving a first substrate with a surface; receiving a second substrate; determining a pad array on the surface of the first substrate, wherein the pad array includes a first type pad and a second type pad; forming a via pattern underlying the pad array in the first substrate according to the location of each via, wherein the first type pad in the pad array is directly contacting a via of the via pattern and the second type pad in the pad array is clear of any via of the via pattern; laterally connecting the second type pad with a conductive trace, wherein the conductive trace connects to another via that is same level with the via contacting the first type pad; and disposing a first conductive bump and a second conductive bump between the first substrate and the second substrate.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Yuan Yu, Hao-Yi Tsai, Chao-Wen Shih, Hung-Yi Kuo, Pi-Lan Chang
  • Patent number: 10502226
    Abstract: A centrifugal blower is provided. The centrifugal blower includes a hub, a shaft, a motor, a plurality of blades, a rib, and a first fin. The shaft is connected to the hub. The motor rotates the shaft. Each blade includes a rib and a first fin. The rib is connected to the hub, wherein the rib extends from the hub to an end of the blade. The first fin is disposed on a first side of the rib and connected to the hub, wherein the first fin includes a first surface, the rib protrudes from the first surface, and the thickness of the first fin is less than the thickness of the rib.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: December 10, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chao-Wen Lu, Chun-Chih Wang, Ding-Wei Chiu
  • Publication number: 20190368510
    Abstract: A cross flow fan includes a fan frame and a rotor having a hub, a shaft connected with the hub at its rotation center, a plurality of blades, and a disk structure connected with the blades and hub within the fan frame. The fan frame has a frame wall having a lateral flow inlet to the rotor and a lateral flow outlet from the rotor, a base carrying the rotor and frame wall, a cover on one side of the frame wall opposite to the base, and a partition structure disposed between the blades and an inner wall surface of the frame wall. A normal line of the lateral flow inlet and a normal line of the lateral flow outlet are not parallel to an extension direction of the shaft. The blades directly face the lateral flow inlet and the lateral flow outlet along radial directions of the shaft.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Inventors: Tsung-Ying LEE, Shih-Han CHEN, Chao-Wen LU
  • Patent number: 10490479
    Abstract: A semiconductor package includes an integrated circuit (IC), a heat dissipation structure, a molding layer and an antenna. The IC is mounted on a first surface of a first redistribution layer (RDL). The heat dissipation structure is mounted on a second surface of the first RDL. The molding compound is disposed over the first surface of the first RDL. The antenna is disposed on the second surface of the first RDL, wherein the antenna is disposed side-by-side to the heat dissipation structure.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Chao-Wen Shih, Han-Ping Pu, Hsin-Yu Pan, Sen-Kuei Hsu
  • Publication number: 20190355694
    Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer having a core layer formed thereon is provided. The core layer includes a plurality of cavities penetrating through the core layer. The dielectric layer and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. A plurality of first conductive patches is formed on the dielectric layer above the cavities.
    Type: Application
    Filed: July 28, 2019
    Publication date: November 21, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Ching-Hua Hsieh, Chung-Hao Tsai, Chuei-Tang Wang, Chao-Wen Shih, Han-Ping Pu, Chien-Ling Hwang, Pei-Hsuan Lee, Tzu-Chun Tang, Yu-Ting Chiu, Jui-Chang Kuo
  • Patent number: 10483617
    Abstract: A package structure including an insulating encapsulation, at least one semiconductor die, at least one first antenna and at least one second antenna is provided. The insulating encapsulation includes a first portion, a second portion and a third portion, wherein the second portion is located between the first portion and the third portion. The at least one semiconductor die is encapsulated in the first portion of the insulating encapsulation, and the second portion and the third portion are stacked on the at least one semiconductor die. The at least one first antenna is electrically connected to the at least one semiconductor die and encapsulated in the third portion of the insulating encapsulation. The at least one second antenna is electrically connected to the at least one semiconductor die and encapsulated in the second portion of the insulating encapsulation.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nan-Chin Chuang, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • Patent number: 10475757
    Abstract: A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: November 12, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Chao-Wen Shih, Shou-Zen Chang, Nan-Chin Chuang
  • Publication number: 20190341363
    Abstract: An embodiment package comprises an integrated circuit die encapsulated in an encapsulant, a patch antenna over the integrated circuit die, and a dielectric feature disposed between the integrated circuit die and the patch antenna. The patch antenna overlaps the integrated circuit die in a top-down view. The thickness of the dielectric feature is in accordance with an operating bandwidth of the patch antenna.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Chen-Hua Yu, Kai-Chiang Wu, Chung-Shi Liu, Shou Zen Chang, Chao-Wen Shih
  • Publication number: 20190333877
    Abstract: A semiconductor device including a chip package, a dielectric structure and a first antenna pattern is provided. The dielectric structure disposed on the chip package and includes a cavity and a vent in communication with the cavity. The first antenna pattern disposed on the dielectric structure, wherein the chip package is electrically coupled to the first antenna pattern, and the cavity of the dielectric structure is disposed between the chip package and the first antenna pattern. A manufacturing method of a semiconductor device is also provided.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 31, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Ching-Hua Hsieh, Chao-Wen Shih, Han-Ping Pu, Meng-Tse Chen, Sheng-Hsiang Chiu
  • Publication number: 20190321646
    Abstract: Methods and devices for managing establishment of a communications link between an external instrument (EI) and an implantable medical device (IMD) are provided. The methods and devices comprise storing, in memory in at least one of the IMD or the EI an advertising schedule defining a pattern for advertisement notices. The advertisement notices are distributed un-evenly and separated by unequal advertisement intervals. The method transmits, from a transmitter in at least one of the IMD or the EI the advertisement notices. The advertisement notices are distributed as defined by the advertising schedule. The method establishes a communication session between the IMD and the EI.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Inventors: Yongjian Wu, Samir Shah, Heidi Hellman, Reza Shahandeh, Tejpal Singh, Youjing Huang, Chao-Wen Young
  • Patent number: 10449372
    Abstract: Methods and devices for managing establishment of a communications link between an external instrument (EI) and an implantable medical device (IMD) are provided. The methods and devices comprise storing, in memory in at least one of the IMD or the EI an advertising schedule defining a pattern for advertisement notices. The advertisement notices are distributed un-evenly and separated by unequal advertisement intervals. The method transmits, from a transmitter in at least one of the IMD or the EI the advertisement notices. The advertisement notices are distributed as defined by the advertising schedule. The method establishes a communication session between the IMD and the EI.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: October 22, 2019
    Assignee: Pacesetter, Inc.
    Inventors: Yongjian Wu, Samir Shah, Heidi Hellman, Reza Shahandeh, Tejpal Singh, Youjing Huang, Chao-Wen Young
  • Fan
    Patent number: 10436223
    Abstract: A fan includes a fan frame and a rotor having a hub, a shaft connected with the hub at its rotation center, blades, and a disk structure connected with the blades and hub within the fan frame. The fan frame has a frame wall having inlet and outlet surfaces, a base carrying the rotor and frame wall, a cover on one side of the frame wall opposite to the base, and a tongue structure between the base and cover. The normal lines of the inlet and outlet surfaces are not parallel to the extension direction of the shaft. The distance between the virtual line segment of the outlet surface and shaft is the shortest distance between the shaft and outlet surface. The extended line from the center of the groove opening of the tongue structure intersects the imaginary plane where the virtual line segment and shaft are located.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: October 8, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Tsung-Ying Lee, Shih-Han Chen, Chao-Wen Lu
  • Publication number: 20190296607
    Abstract: A micro fan is provided. The micro fan includes a rotor and a stator. The stator includes a plurality of axial induced coil units and a circuit board. The axial induced coil units are respectively preformed as a plurality of stator magnetic pole units, and are coupled to the circuit board. At least one of the coil units includes a coil and insulation material. The insulation material is block-shaped and covers at least a portion of the coil, and the central axis of the coil is parallel to the shaft of the rotor.
    Type: Application
    Filed: June 11, 2019
    Publication date: September 26, 2019
    Inventors: Chin-Chun LAI, Kun-Fu CHUANG, Chao-Wen LU
  • Publication number: 20190279951
    Abstract: Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die having a conductive element and a first protective layer surrounding the semiconductor die. The chip package also includes a second protective layer over the semiconductor die and the first protective layer. The chip package further includes an antenna element over the second protective layer. The antenna element is electrically connected to the conductive element of the semiconductor die.
    Type: Application
    Filed: May 30, 2019
    Publication date: September 12, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Ping CHIANG, Yi-Che CHIANG, Nien-Fang WU, Min-Chien HSIAO, Chao-Wen SHIH, Shou-Zen CHANG, Chung-Shi LIU, Chen-Hua YU
  • Patent number: 10412867
    Abstract: The present invention discloses an electromagnetic shielding assembly including an electromagnetic interference shielding component including a plate body and a bending portion. An included angle is formed between the plate body and the bending portion, and the plate body and the bending portion cover an input socket of a power supply. The electromagnetic interference shielding component includes at least one grounding pin disposed on the plate body or/and the bending portion and configured to ground with and screw to a housing of the power supply, and a welding pin disposed on a side of the bending portion away from the plate body and electrically connected to an auxiliary circuit board. The electromagnetic interference shielding component provides functions of EMI shielding, lightning (current) discharging and fixture, which can simplify the structure, increase the discharging speed and time, and reduce the amount of disturbance of the large current instantaneous to the ground.
    Type: Grant
    Filed: January 6, 2019
    Date of Patent: September 10, 2019
    Assignee: 3Y POWER TECHNOLOGY (TAIWAN), INC.
    Inventors: Shao-Feng Lu, Chuan-Kai Wang, Yi-Chen Kuan, Chung-Yu Lan, Jen-Ming Hsu, Chao-Wen Fu
  • Patent number: 10408923
    Abstract: A laser radar device comprises a laser projecting system and a laser radar detecting system. The laser projecting system comprises a laser diode; and a light source orientation adjustment unit comprising a collimating lens and a Powell lens to modulate the angle at which the first incident laser beam is projected onto an object. The laser radar detecting system comprises at least two laser radar detection units disposed in the horizontal direction and vertical direction of the object, respectively. The laser radar detection units each comprise a wedge-shaped lens, an aspherical lens system and an optical detector. By designing optical parameters of the wedge-shaped lens and stacking the laser radar detection units in the horizontal direction and vertical direction, it is feasible to facilitate overall device manufacturing and processing, meet R&D needs, and adjust an optical system in its entirety easily.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 10, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chao-Wen Liang, Li-Tsun Wang, Shih-Che Chien, Yu-Sung Hsiao
  • Publication number: 20190267295
    Abstract: A bottom emission microLED display includes a microLED disposed above a transparent substrate; a light guiding layer surrounding the microLED to controllably guide light generated by the microLED towards the transparent substrate; and a reflecting layer formed over the light guiding layer to reflect the light generated by the microLED downwards and to confine the light generated by the microLED to prevent the light from leaking upwards or sidewards.
    Type: Application
    Filed: May 7, 2019
    Publication date: August 29, 2019
    Inventors: Biing-Seng Wu, Chao-Wen Wu