Patents by Inventor Chao Yang
Chao Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240306476Abstract: A display panel includes: a light-emitting baseplate including a plurality of light-emitting components arranged in array; a first light extraction layer located at a light-emitting side of the light-emitting baseplate and including a plurality of first light extraction patterns, orthographic projections of the plurality of first light extraction patterns on the light-emitting baseplate covering at least part area of the light-emitting components; a color filter layer including a plurality of filter patterns, orthographic projections of the plurality of filter patterns on the light-emitting baseplate covering orthographic projections of the plurality of light-emitting components on the light-emitting baseplate; and a second light extraction layer including a plurality of second light extraction patterns, orthographic projections of the second light extraction patterns on the light-emitting baseplate being within the orthographic projections of the plurality of filter patterns on the light-emitting baseplate.Type: ApplicationFiled: April 27, 2022Publication date: September 12, 2024Applicants: Yunnan Invensight Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Hongtao Yu, Weiliang Bu, Yunhao Zhang, Dongdong Su, Yuhao Lee, Zongshun Yang, Hui Tong, Kuanta Huang, Xiaochuan Chen, Hui Wang, Fushuang Zhang, Chao Yang, Qinshan Cai, Lingang Wen
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Publication number: 20240304354Abstract: A particle trap system is provided, to resolve a problem of complex particle addressing in a conventional technology, and can be used in fields such as quantum computing. The particle trap system may include a trapping module, a first optical splitting module, and a first relative delay module. The trapping module is configured to trap at least two particles. The first optical splitting module is configured to split a received light beam into a first light beam and a second light beam. The first relative delay module is configured to adjust a delay amount for the first light beam and the second light beam to reach a first target particle, where an adjusted first light beam and an adjusted second light beam overlap at the first target particle, and the first target particle is at least one particle in the trapping module.Type: ApplicationFiled: May 16, 2024Publication date: September 12, 2024Inventors: Mengxiang Zhang, Chao Yang, Yiheng Lin, Jiangfeng Du
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Publication number: 20240304547Abstract: Embodiments of present invention provide a wiring structure. The wiring structure includes a metal line in a dielectric layer, where the metal line has a first sidewall and a second sidewall opposite the first sidewall and, from a bottom to a top thereof, includes at least a first section and a second section, where first and second sidewalls of the first section lean outwards from a bottom to a top of the first section, and first and second sidewalls of the second section lean inwards from a bottom to a top of the second section. A method of manufacturing the wiring structure is also provided.Type: ApplicationFiled: March 7, 2023Publication date: September 12, 2024Inventors: Oscar van der Straten, Linda W Wangoh, Chih-Chao Yang
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Publication number: 20240304626Abstract: A semiconductor structure including a first stacked transistor structure adjacent to a second stacked transistor structure, and a first conductive structure in direct contact with and electrically connecting a bottom gate conductor of the first stacked transistor structure and a top gate conductor of the second stacked transistor structure.Type: ApplicationFiled: March 9, 2023Publication date: September 12, 2024Inventors: Tsung-Sheng Kang, Albert M. Chu, Tao Li, Chih-Chao Yang
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Publication number: 20240304546Abstract: A structure including a homogeneous interconnect structure embedded in a dielectric layer, where the homogeneous interconnect structure includes a first region and a second region one above another, where the first region comprises a width which increases relative to height, and where the second region comprises a width which decreases relative to height.Type: ApplicationFiled: March 7, 2023Publication date: September 12, 2024Inventors: Oscar van der Straten, Koichi Motoyama, Chih-Chao Yang
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Publication number: 20240304705Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.Type: ApplicationFiled: May 16, 2024Publication date: September 12, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
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Patent number: 12084971Abstract: A section of a node of the station is a section with an arch roof and a straight wall of three underground floors, a first underground floor is a station hall floor 1, and a second underground floor is a platform floor 2 of a subway line A and a third underground floor is a platform floor 3 of a subway line B; and directions of the subway line A and the subway line B are orthogonal. Second lining structures of the first and second underground floors are firstly constructed, and after a shield tunneling machine is pushed through the station, the structure of the third underground floor is constructed by a reverse construction method. Thus, the present disclosure is conducive to improving the efficiency of overall construction, guaranteeing timely tunnel construction completion of two lines and hence timely track construction completion and electricity wiring completion.Type: GrantFiled: May 23, 2024Date of Patent: September 10, 2024Assignee: Beijing Urban Construction Design & Development Group Co., LimitedInventors: Gang Lei, Zhihui Yang, Fucai Hua, Chao Xie, Jianye Zhu, Chao Li, Ningning Li, Tingting Zhou
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Patent number: 12084746Abstract: Disclosed are a 4D printing method and application of titanium-nickel shape memory alloy. The 4D printing method comprises the following steps: mixing and smelting pure titanium and pure nickel to obtain titanium-nickel alloy bars, then preparing alloy powder by a rotating electrode atomization method, and sieving the powder to obtain titanium-nickel alloy powder with a particle size of 15-53 ?m; placing the obtained titanium-nickel alloy powder in a discharge plasma assisted ball mill for discharge treatment to perform surface modification of the powder; and subjecting the titanium-nickel alloy powder to SLM forming to obtain the titanium-nickel shape memory alloy.Type: GrantFiled: January 3, 2020Date of Patent: September 10, 2024Assignees: South China University of Technology, Guangdong Huayi Plumbing Fittings Industry Co., Ltd., Sun Yat-Sen University Cancer CenterInventors: Chao Yang, Haizhou Lu, Yanfei Ding, Yuanyuan Li, Jin Wang
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Patent number: 12087763Abstract: The present disclosure provides a nitride-based bidirectional switching device with substrate potential management capability. The device has a control node, a first power/load node, a second power/load node and a main substrate, and comprises: a nitride-based bilateral transistor and a substrate potential management circuit configured for managing a potential of the main substrate. By implementing the substrate potential management circuit, the substrate potential can be stabilized to a lower one of the potentials of the first source/drain and the second source/drain of the bilateral transistor no matter in which directions the bidirectional switching device is operated. Therefore, the bilateral transistor can be operated with a stable substrate potential for conducting current in both directions.Type: GrantFiled: December 22, 2021Date of Patent: September 10, 2024Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.Inventors: Qiyue Zhao, Chunhua Zhou, Maolin Li, Wuhao Gao, Chao Yang, Guanshen Yang, Shaopeng Cheng
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Patent number: 12087624Abstract: A dielectric layer is located on top of and in contact with a substrate. A conductive line located within the dialectic layer. A barrier layer on top of an in contact with the dielectric layer. The barrier layer is below the conductive line. A liner layer on top of and in contact with the barrier layer and below and in contact with the conductive line. A metal liner on top of and in contact with the conductive line. A capping layer on top of and in contact with the dielectric layer, the barrier layer, the liner layer, and the metal liner.Type: GrantFiled: September 21, 2021Date of Patent: September 10, 2024Assignee: International Business Machines CorporationInventors: Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng, Chih-Chao Yang
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Publication number: 20240297174Abstract: The present application provides an array substrate, a display panel, and a display device. In the present application, a plurality of first-type data lines and a plurality of second-type data lines with data voltages of opposite polarities are provided, and a light-shielding layer of each of first sub-pixels is at least electrically connected to a light-shielding layer of one of second sub-pixels through a connecting line, which can effectively reduce a change in pixel brightness caused by capacitive coupling, and relieve a problem of image flicker.Type: ApplicationFiled: March 31, 2021Publication date: September 5, 2024Inventors: Xuebin YUAN, Yanqing GUAN, Congxing YANG, Chao TIAN, Fuhsiung TANG
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Publication number: 20240298486Abstract: A display panel and a display apparatus. The display panel includes a backplane (10) and light-emitting devices (20). The backplane (10) includes: a base substrate (101); pixel driving circuits (102); a first insulating layer (103); conductive portions (104), wherein each of the conductive portions (104) is connected to a corresponding pixel driving circuit (102) via a first connector (CM1) penetrating through the first insulating layer (103); and a second insulating layer (105) located on the side of the first insulating layer (103) and the conductive portions (104) away from the base substrate (101). The light-emitting devices (20) are located on the side of the second insulating layer (105) away from the base substrate (101), wherein an anode (201) of at least one of the light-emitting devices (20) is connected to a corresponding conductive portion (104) via second connectors (CM2) penetrating through the second insulating layer (105).Type: ApplicationFiled: December 24, 2021Publication date: September 5, 2024Applicants: YUNNAN INVENSIGHT OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Chao PU, Shengji YANG, Kuanta HUANG, Pengcheng LU, Xiaochuan CHEN, Junbo WEI, Zhao MA, Liuzeming QU
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Publication number: 20240297183Abstract: An array base plate includes a substrate base plate; a repairing line and data lines provided on one side of the substrate base plate, wherein the data lines include a first data line, the first data line has a first breaking point, and first data lines located on two sides of the first breaking point are individually connected to the repairing line; a first insulating layer provided on one side of the repairing line and the data lines that is opposite to the substrate base plate; and pixel electrodes provided on one side of the first insulating layer that is opposite to the substrate base plate, wherein the pixel electrodes include a first pixel electrode; the first data line is connected to the first pixel electrode; and orthographic projections on the substrate base plate of the repairing line and the first pixel electrode intersect or overlap.Type: ApplicationFiled: April 19, 2022Publication date: September 5, 2024Applicants: Chengdu BOE Display Sci-tech Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tao Qiu, Xi Yang, Cunkang Liao, Yudan Yang, Chao Xie
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Patent number: 12077643Abstract: An encapsulant film is made from a composition comprising (A) a non-polar ethylene-based polymer having a density of 0.850 g/cc to 0.890 g/cc; (B) an organic peroxide; (C) a silane coupling agent; and (D) a co-agent comprising triallyl phosphate.Type: GrantFiled: October 3, 2022Date of Patent: September 3, 2024Assignee: Dow Global Technologies LLCInventors: Chao He, Bharat I. Chaudhary, Brian M. Habersberger, Hong Yang, Weiming Ma, Yuyan Li
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Patent number: 12081475Abstract: This application relates to the communications field, and provides a transmission mode determining method and an apparatus, to better select a transmission mode and/or a transmission parameter of data autonomously. The transmission mode determining method includes: A first device measures a first resource set based on first information, to obtain a first measurement value, where the first information includes at least one of the following information: a subcarrier spacing of the first resource set, a quality of service parameter of first data, and feedback information between the first device and a second device, and the first resource set is to be used to transmit the first data. The first device determines a transmission mode of the first data based on the first measurement value, and/or determines a transmission parameter of the first data based on the first measurement value.Type: GrantFiled: October 29, 2021Date of Patent: September 3, 2024Assignee: Huawei Technologies Co., Ltd.Inventors: Chao Li, Zhe Liu, Fan Yang, Junwei Wang
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Publication number: 20240287026Abstract: A substituted triazinylmethylcycloalkylcarboxylic acid derivative having a structure as shown in formula (I). In addition, further disclosed are a pharmaceutically acceptable salt, a stereoisomer, a pharmaceutical composition and the use of the derivative. The compound has significant P2X3 inhibitory activity and selectivity, and is high in application value.Type: ApplicationFiled: June 1, 2022Publication date: August 29, 2024Inventors: Bin HU, Jingfeng ZHU, Wen YANG, Jing XIE, Xiaoyong SHI, Kai ZHANG, Zhiming ZHAO, Chao KAN
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Publication number: 20240286474Abstract: A frameless vehicle door sealing strip structure is applied to a sealing connection of a glass piece and a cover plate and includes a sealing strip body and a first and second sealing part. The strip body arranged between the glass piece and the cover plate is fixedly connected to a spigot component of the side wall of the cover plate. The first sealing part is arranged on the side, facing the glass piece, of the strip body in a protruding mode and abuts against and is attached to the side, facing the strip body, of the glass piece. The second sealing part is arranged on the side, facing the glass piece, of the strip body in a protruding mode and fills a gap between the glass piece and the cover plate. Two defensive lines for sealing and water retaining are formed through the first and second sealing part.Type: ApplicationFiled: January 29, 2024Publication date: August 29, 2024Inventors: Jinhui Ma, Chao Yang, Minchun Zhou, Jian Gong
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Publication number: 20240286163Abstract: A coating die configured to apply a slurry onto a base material. The coating die includes a feed inlet, a distributary channel, a first confluence chamber and a discharge outlet. The feed inlet is configured to inject the slurry. The distributary channel is provided inside the coating die. The distributary channel includes a first flow channel and a plurality of second flow channels. The first flow channel communicates the feed inlet with the plurality of second flow channels, and the plurality of second flow channels is provided to be spaced from one another in a first direction. The first confluence chamber is provided inside the coating die and communicated with the plurality of second flow channels to collect the slurry from the plurality of second flow channels.Type: ApplicationFiled: April 30, 2024Publication date: August 29, 2024Inventors: Guozhong YANG, Xiangli SUN, Fengdan LI, Xiaoping WU, Chao YANG
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Patent number: 12074159Abstract: The present disclosure provides a nitride-based bidirectional switching device with substrate potential management capability. The device has a control node, a first power/load node, a second power/load node and a main substrate, and comprises: a nitride-based bilateral transistor and a substrate potential management circuit configured for managing a potential of the main substrate. By implementing the substrate potential management circuit, the substrate potential can be stabilized to a lower one of the potentials of the first source/drain and the second source/drain of the bilateral transistor no matter in which directions the bidirectional switching device is operated. Therefore, the bilateral transistor can be operated with a stable substrate potential for conducting current in both directions.Type: GrantFiled: December 22, 2021Date of Patent: August 27, 2024Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.Inventors: Qiyue Zhao, Chunhua Zhou, Maolin Li, Wuhao Gao, Chao Yang, Guanshen Yang, Shaopeng Cheng
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Publication number: 20240277865Abstract: Disclosed herein is a phage-displayed single-chain variable fragment (scFv) library, which comprises a plurality of phage-displayed scFvs characterized with a specific sequence in each CDR. The present phage-displayed scFv library is useful in selecting an antibody fragment exhibiting a binding affinity and specificity to mesothelin (MSLN). Also disclosed herein are a recombinant antibody specific to MSLN, an immunoconjugate comprising the recombinant antibody, and uses thereof in treating cancers.Type: ApplicationFiled: June 8, 2022Publication date: August 22, 2024Inventors: An-Suei YANG, Hung-Ju HSU, Chao-Ping TUNG, Chung-Ming YU, Chi-Yung CHEN, Hong-Sen CHEN, Yu-Chuan HUANG, Pei-Hsun TSAI, Szu-Yu LIN, Hung-Pin PENG