Patents by Inventor Chao Yang
Chao Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12176343Abstract: The present disclosure provides a nitride-based bidirectional switching device with substrate potential management capability. The device has a control node, a first power/load node, a second power/load node and a main substrate, and comprises: a nitride-based bilateral transistor and a substrate potential management circuit configured for managing a potential of the main substrate. By implementing the substrate potential management circuit, the substrate potential can be stabilized to a lower one of the potentials of the first source/drain and the second source/drain of the bilateral transistor no matter in which directions the bidirectional switching device is operated. Therefore, the bilateral transistor can be operated with a stable substrate potential for conducting current in both directions.Type: GrantFiled: December 22, 2021Date of Patent: December 24, 2024Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.Inventors: Qiyue Zhao, Chunhua Zhou, Maolin Li, Wuhao Gao, Chao Yang, Guanshen Yang, Shaopeng Cheng
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Patent number: 12178045Abstract: Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. First and second arrays of pillars extend through the stack structure of the lower and upper decks, respectively. In one or more of the first and second pillar arrays, at least some pillars exhibit a greater degree of bending away from a vertical orientation than at least some other pillars. The pillars of the first array align with the pillars of the second array along an interface between the lower and upper decks. Related methods are also disclosed.Type: GrantFiled: January 24, 2023Date of Patent: December 24, 2024Assignee: Micron Technology, Inc.Inventors: Md Zakir Ullah, Xiaosong Zhang, Adam L. Olson, Mohammad Moydul Islam, Tien Minh Quan Tran, Chao Zhu, Zhigang Yang, Merri L. Carlson, Hui Chin Chong, David A. Kewley, Kok Siak Tang
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Patent number: 12173332Abstract: A new mutant of D-amino acid transaminase, based on supercomputing-assisted technology, belongs to the fields of computational biology, computer-aided design, and enzyme engineering technology, and specifically relates to mutants of D-amino acid transaminase obtained based on supercomputing-assisted technology and applications thereof. Compared to the wild-type enzyme, the aforementioned mutant of D-amino acid transaminase exhibits a half-life (t1/2) of over 12 hours at 40° C., while it is only 8.8 minutes for the wild-type D-amino acid transaminase. The half-inactivation temperature (T5015) of the mutant is 45.3° C., approximately 5.4° C. higher than that of the wild-type D-amino acid transaminase. This substantially enhances its thermal stability, enzymatic activity, etc., effectively broadening its application fields and scope. The mutant has a wide range of industrial applications and thus holds substantial practical value.Type: GrantFiled: July 26, 2023Date of Patent: December 24, 2024Assignee: SHANDONG COMPUTER SCIENCE CENTER (NATIONAL SUPERCOMPUTER CENTER IN JINAN)Inventors: Xin Wang, Ming Yang, Xiaoming Wu, Fuqiang Wang, Yan Liang, Zhenya Chen, Chao Mu
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Publication number: 20240421064Abstract: A semiconductor device including a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry, where a bottom electrode of the MIM capacitor includes a plurality of vertical pillars extending up from a bottom layer. A semiconductor device including a metal insulator metal capacitor (MIM capacitor), where a bottom electrode of the MIM capacitor includes a plurality of vertical pillars extending up from a bottom layer. Forming back end of line Mx-1 metal line layer, forming a plurality of Vx-1 via on the Mx-1 metal line layer, forming Mx metal line layer with subtractive patterning on the plurality of the Vx-1 via, forming a plurality of Vx via on the Mx metal line layer with subtractive patterning; and forming a block mask protecting a portion of the semiconductor device.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Inventors: Chanro Park, Ruilong Xie, Julien Frougier, Chih-Chao Yang, Ashim Dutta, Shravana Kumar Katakam
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Publication number: 20240421076Abstract: According to the embodiment of the present invention, a semiconductor device includes an interconnect. The interconnect includes a bottom interconnect section and a top interconnect section. The bottom interconnect section includes a first orientation along a Y-axis. The top interconnect section is coupled to the bottom interconnect section and includes a second orientation along to the Y-axis. The second orientation of the top interconnect section is a vertical reflection of the first orientation of the bottom interconnect section.Type: ApplicationFiled: June 13, 2023Publication date: December 19, 2024Inventors: Oscar van der Straten, Chih-Chao Yang, Koichi Motoyama
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Publication number: 20240421067Abstract: A semiconductor device including a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, where the MIM capacitor surrounds a first Mx metal line. A semiconductor device including a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, where the MIM capacitor surrounds a first Mx metal line, where a lower horizontal surface of the MIM capacitor is vertically adjacent to an upper horizontal surface of an Mx-1 metal line. A method including forming a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, where the MIM capacitor surrounds a first Mx metal line.Type: ApplicationFiled: June 19, 2023Publication date: December 19, 2024Inventors: Baozhen Li, Chih-Chao Yang, HUIMEI ZHOU, Yueming Xu
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Publication number: 20240418549Abstract: The present invention provides a fluid measurement apparatus, including a pressure sensing element and a data processing element. The pressure sensing element is disposed in direct contact with a measured fluid, the pressure sensing element is a sealed element, and includes a first surface and a second surface that are disposed opposite to each other, the measured fluid directly impacts the first surface and the second surface, and pressure values generated when the first surface and the second surface are impacted by the measured fluid are detected. The data processing element is connected to the pressure sensing element, and a flow velocity and/or a flow rate of the measured fluid are/is calculated by using the pressure value detected by the pressure sensing element. The present invention resolves a problem that the fluid measurement apparatus cannot operate normally due to clogging of a pressure tap hole.Type: ApplicationFiled: September 2, 2024Publication date: December 19, 2024Inventors: ZhongHui Wang, JiHui Li, Qing Lan, KeLong Zhang, LiZhuang Tang, Xiao Cai, Chao Wang, Bo Yao, Xiu Yang, JinMing Li, JianPing Zhao
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Patent number: 12170035Abstract: A display module includes a flexible display panel and a bearing structure. The flexible display panel includes a display part and a fan-out part coupled to the display part. The bearing structure includes a first bearing film and a first supporting structure. The first bearing film is at a non-light-emitting side of the flexible display panel, covers the display part and the fan-out part, and is configured to bear the flexible display panel. The first supporting structure is at a side of the first bearing film away from the flexible display panel. An orthographic projection of the first supporting structure on the flexible display panel is within an area where the fan-out part is located and at one end away from the display part, and the first supporting structure supports a portion of the fan-out part of the flexible display panel and a portion of the first bearing film.Type: GrantFiled: November 25, 2021Date of Patent: December 17, 2024Assignees: Beijing BOE Technology Development Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.Inventors: Shuquan Yang, Liqiang Chen, Chao Yang, Dongdong Zhao, Shengxing Zhang, Mengyuan Pang
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Publication number: 20240414977Abstract: A display substrate and a method of manufacturing the display substrate are provided. The display substrate includes a base substrate and a plurality of sub-pixels. A first electrode of a light-emitting element of the sub-pixel includes: a first conductive layer electrically connected to a source or a drain of a driving transistor of the sub-pixel; a second conductive layer; and a transparent material layer. The transparent material layer includes a first transparent material sub-layer and a second transparent material sub-layer, the first transparent material sub-layer is between the second transparent material sub-layer and the second conductive layer, the second transparent material sub-layer covers the first transparent material sub-layer, and an edge of the first transparent material sub-layer is aligned with an edge of the second conductive layer.Type: ApplicationFiled: August 19, 2024Publication date: December 12, 2024Inventors: Zhongxiang Yu, Zongshun Yang, Chao Yang, Hongtao Yu, Kuanta Huang, Xiaochuan Chen, Qingshan Shan, Dongdong Su, Ruquan Li, Jianming Zou, Shipeng Li, Yunhao Zhang, Lei Fang, Xueliang Zhu, Xiong Yang, Ao Li, Fushuang Zhang, Jixing Wang
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Publication number: 20240414965Abstract: The present disclosure relates to a display module and a manufacturing method thereof. The display module includes a display region and a non-display region located on the periphery of the display region. The display module includes an array substrate, a first inorganic layer, a second inorganic layer, a first mounting groove, and an electrode wire. The first inorganic layer is provided on the array substrate. The first inorganic layer includes a first inorganic part located in the non-display region. The second inorganic layer is provided on a side of the first inorganic layer far from the array substrate. The second inorganic layer includes a second inorganic part located on the first inorganic part. The first mounting groove is located in the non-display region and surrounds a portion of the display region, and the first mounting groove penetrates through the first inorganic part and the second inorganic part.Type: ApplicationFiled: July 31, 2023Publication date: December 12, 2024Inventors: Dongdong SU, Hongtao YU, Yunhao ZHANG, Zongshun YANG, Zhongxiang YU, Chao YANG, Fushuang ZHANG, Renqi XIE, Zhoujun SHAO, Weiliang BU, Kuanta HUANG
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Publication number: 20240410280Abstract: A method for selecting parameters for tunnel support based on engineering-oriented behavior discrimination of surrounding rock includes: obtaining basic geological data of a running tunnel, establishing a model of a relative location relationship between the running tunnel and a stratum, and determining a chamber environment classification of a surrounding rock of the running tunnel; determining rock integrity of the surrounding rock of the running tunnel based on the basic geological data; determining a groundwater development level of the surrounding rock of the running tunnel based on the basic geological data; determining, based on the basic geological data, whether there is a slip surface on the surrounding rock of the running tunnel; and selecting support parameters for a corresponding support measure based on behavior of the surrounding rock including the chamber environment classification, the rock integrity, the groundwater development level, and whether the slip surface exists.Type: ApplicationFiled: January 2, 2024Publication date: December 12, 2024Applicants: Beijing Urban Construction Design&Development Group Co., LimitedInventors: Gang LEI, Fucai HUA, Zhihui YANG, Jianye ZHU, Chao LI
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Publication number: 20240410036Abstract: A high-strength and high-toughness non-heat-treatable die-casting aluminum-silicon alloy and a preparation method therefor are provided. The alloy includes the following components in percentage by weight: 8.0-10.0% of Si, 0.1-0.5% of Mg, 0.5-0.8% of Mn, 0.05-0.5% of Cu, 0.05-0.2% of Ti, 0.01-0.05% of Sr, 0.01-0.1% of V, 0.01-0.15% of RE, less than 0.2% of Fe, less than or equal to 0.4% of other impurities and the balance of Al. Based on modification refinement of eutectic Si by Sr, during preparation, the elements V and RE are imported to further significantly refine eutectic Si structures, so that the alloy obtains features of high strength and high toughness with a high Si content. Under a die-casting condition, the yield strength of the alloy can be 120-160 Mpa, the tensile strength thereof can be 260-320 Mpa and the ductility thereof can be 10-15%.Type: ApplicationFiled: September 15, 2022Publication date: December 12, 2024Applicants: SHANGHAI JIAO TONG UNIVERSITY, FENGYANG AER SI LIGHT ALLOY PRECISION MOLDING CO. LTDInventors: Liming PENG, Lingyang YUAN, Lei YANG, Gang XIAO, Chao YANG
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Publication number: 20240414964Abstract: Provided is a display substrate. The display substrate includes a first conductive layer including the first electrode corresponding to each of the light-emitting components; a plurality of organic functional material layers, each of the organic functional material layers including one organic functional layer corresponding to each of the light-emitting components; at least one second conductive layer, each second conductive layer including the connection electrode corresponding to each of the light-emitting components; and a pixel definition layer including retaining walls and accommodating parts, one accommodating part being arranged corresponding to one first electrode; wherein the retaining wall is provided with a groove; an opening size of the groove proximal to the base substrate is not smaller than an opening size of the groove distal to the base substrate; and the groove at least disconnects the second conductive layer formed thereon to form the connection electrodes.Type: ApplicationFiled: July 31, 2023Publication date: December 12, 2024Inventors: Zongshun YANG, Hongtao YU, Dongdong SU, Yunhao ZHANG, Zhongxiang YU, Jianming ZOU, Fushuang ZHANG, Chao YANG, Kuanta HUANG, Shengji YANG, Xiaochuan CHEN
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Patent number: 12166114Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a gate electrode, a first electrode, a first via and a second via. The substrate has a first surface and a second surface. The first nitride semiconductor layer is disposed on the first surface of the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap exceeding that of the first nitride semiconductor layer. The gate electrode and the first electrode are disposed on the second nitride semiconductor layer. The first via extends from the second surface and is electrically connected to the first electrode. The second via extends from the second surface. The depth of the first via is different from the depth of the second via.Type: GrantFiled: January 27, 2021Date of Patent: December 10, 2024Assignee: INNOSCIENCE (SUZHOU) SEMICONDUCTOR CO., LTD.Inventors: Jingyu Shen, Qiyue Zhao, Chunhua Zhou, Chao Yang, Wuhao Gao, Yu Shi, Baoli Wei
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Patent number: 12167700Abstract: Memory structures including an MTJ-containing pillar that is void of re-sputtered bottom electrode metal particles is provided by first forming the MTJ-containing pillar on a sacrificial material-containing structure, and thereafter replacing the sacrificial material-containing structure with at least a replacement bottom electrode structure. In some embodiments, the sacrificial material-containing structure is replaced with both a bottom electrode diffusion barrier liner and a replacement bottom electrode structure.Type: GrantFiled: August 4, 2021Date of Patent: December 10, 2024Assignee: International Business Machines CorporationInventors: Oscar van der Straten, Koichi Motoyama, Joseph F. Maniscalco, Chih-Chao Yang
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Publication number: 20240407206Abstract: The present disclosure provides a display panel and a display apparatus, the display panel includes an base substrate and multiple pixel unit groups disposed on the base substrate and arranged in an array, each pixel unit group including a first pixel unit and a second pixel unit disposed on the base substrate; the first pixel unit includes a pixel driving circuit and a first light-emitting device electrically connected with the pixel driving circuit, and the second pixel unit includes a second light-emitting device; for the pixel unit groups located in a same row, each pixel driving circuit and a second electrode of each second light-emitting device are connected to a same gate line; for the pixel unit groups located in a same column, each pixel driving circuit is connected to a same data line, and a first electrode of each second light-emitting device is connected to a same data line.Type: ApplicationFiled: July 5, 2023Publication date: December 5, 2024Inventors: Chao YE, Xiaodan WEI, Baosheng HE, Tang YANG, Xiaoyi WANG, Pei LIU
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Publication number: 20240407221Abstract: Embodiments of the present disclosure relate to a display panel, a display device, and a method for preparing a display panel. The display panel includes a substrate; a light-emitting functional layer disposed on the substrate; a filtering layer disposed on a side of the light-emitting functional layer away from the substrate and including a plurality of filtering units, wherein at least one of the plurality of filtering units is designed to allow at least a portion of light from the light-emitting functional layer to diverge; and a plurality of light-converging elements disposed on a side of the filtering layer away from the substrate and configured to allow light from the plurality of filtering units to converge.Type: ApplicationFiled: September 20, 2022Publication date: December 5, 2024Inventors: Chao YANG, Weiliang BU, Kuanta HUANG, Hongtao YU, Dongdong SU, Zongshun YANG, Yunhao ZHANG, Fushuang ZHANG, Zhongxiang YU
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Publication number: 20240400817Abstract: A resin composition includes ABS resin and modified polyester resin, where the modified polyester resin includes a polyester material, a compatibilizer, a toughening agent, a crystallization inhibitor, a slip agent, and an antioxidant. The compatibilizer includes PP-MA, PE-MA, ABS-MA, E-MA-GMA, E-VA-GMA, POE-GMA, PE-GMA, ABS-GMA, or combinations thereof. The toughening agent includes POE, MBS, PTW, or combinations of the above. The crystallization inhibitor includes IPA copolyester, IPA and CHDM copolyester, PETG, PCTG, or combinations of the above. The slip agent includes stearate, polyethylene wax, modified silicone, fluororesin, or combinations thereof. The antioxidant includes a hindered phenolic antioxidant, a phenolic antioxidant, a phosphite antioxidant, or combinations of the above.Type: ApplicationFiled: September 12, 2023Publication date: December 5, 2024Applicant: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Wen-Cheng Yang, Chun-Che Tsao, Chia-Yen Hsiao, Yueh-Shin Liu
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Publication number: 20240403002Abstract: In one general embodiment, a computer-implemented method includes analyzing document object model code for generating locators of elements of a web page. The locators are output visibly on a user interface displaying the web page. A page object code template of the web page is generated. Mappings of the elements and/or the locators to page object variables are received from a user. Representations of the mappings are output visibly on the user interface displaying the web page. Mappings from page areas of the web page to page object functions are received from the user. Representations of the mappings from the page areas of the web page to the page object functions are output visibly on the user interface displaying the web page. Code references are rendered on the user interface displaying the web page.Type: ApplicationFiled: June 5, 2023Publication date: December 5, 2024Inventors: Jin Shi, Chao Yuan Huang, Chun-Sheng Chung, Fan Yang, Rong Chen
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Publication number: 20240407238Abstract: The present disclosure relates to a display module, a manufacturing method thereof, and a display panel. The display module includes a light-emitting structure layer and a lens structure. The light-emitting structure layer includes a pixel unit layer including pixel units and a color filter layer on the pixel unit layer, where the color filter layer includes color filters respectively corresponding to the pixel units. The lens structure is on the light-emitting structure layer and includes lens units respectively corresponding to the color filters. The lens units are made of inorganic materials.Type: ApplicationFiled: July 6, 2023Publication date: December 5, 2024Inventors: Yunhao ZHANG, Zongshun YANG, Hongtao YU, Dongdong SU, Kuanta HUANG, Weiliang BU, Chao YANG, Fushuang ZHANG, Cao WU