Abstract: Coated color-converting particles and associated devices, systems, and methods are disclosed herein. A coating of the coated color-converting particles can include, for example, a parylene, such as a fluorinated parylene. In particular embodiments, the coating can be configured to protect a color-converting material of a particle core of the coated color-converting particles from detrimental reactions. For example, the coating can prevent, slow, or otherwise inhibit detrimental reactions between the color-converting material and a matrix material or between the color-converting material and an environmental constituent that can diffuse through a matrix. In particular embodiments, the coated color-converting particles can be incorporated into a matrix to form a composite. The composite can be used, for example, with a radiation transducer.

Abstract: A method and system for manufacturing a light conversion structure for a light emitting diode (LED) is disclosed. The method includes forming a transparent, thermally insulating cover over an LED chip. The method also includes dispensing a conversion material onto the cover to form a conversion coating on the cover, and encapsulating the LED, the silicone cover, and the conversion coating within an encapsulant. Additional covers and conversion coatings can be added.

Abstract: Solid state lighting devices and associated methods of thermal sinking are described below. In one embodiment, a light emitting diode (LED) device includes a heat sink, an LED die thermally coupled to the heat sink, and a phosphor spaced apart from the LED die. The LED device also includes a heat conduction path in direct contact with both the phosphor and the heat sink. The heat conduction path is configured to conduct heat from the phosphor to the heat sink.

Abstract: Light emitting diodes and methods for manufacturing light emitting diodes are disclosed herein. In one embodiment, a method for manufacturing a light emitting diode (LED) comprises applying a first light conversion material to a first region on the LED and applying a second light conversion material to a second, different region on the LED. A portion of the LED is exposed after applying the first and second light conversion materials.

Abstract: Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission. A conversion material is then formed on the second semiconductor material. The conversion material has a crystalline structure and is configured to produce a second emission. The method further includes adjusting a characteristic of the conversion material such that a combination of the first and second emission has a chromaticity at least approximating a target chromaticity of the light emitting device.

Abstract: Light emitting diodes and methods for manufacturing light emitting diodes are disclosed herein. In one embodiment, a method for manufacturing a light emitting diode (LED) comprises applying a first light conversion material to a first region on the LED and applying a second light conversion material to a second, different region on the LED. A portion of the LED is exposed after applying the first and second light conversion materials.

Abstract: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

Abstract: Light emitting diodes and methods for manufacturing light emitting diodes are disclosed herein. In one embodiment, a method for manufacturing a light emitting diode (LED) comprises applying a first light conversion material to a first region on the LED and applying a second light conversion material to a second, different region on the LED. A portion of the LED is exposed after applying the first and second light conversion materials.

Abstract: Solid state lighting devices and associated methods of thermal sinking are described below. In one embodiment, a light emitting diode (LED) device includes a heat sink, an LED die thermally coupled to the heat sink, and a phosphor spaced apart from the LED die. The LED device also includes a heat conduction path in direct contact with both the phosphor and the heat sink. The heat conduction path is configured to conduct heat from the phosphor to the heat sink.

Abstract: Several embodiments of semiconductor systems and associated methods of color corrections are disclosed herein. In one embodiment, a method for producing a light emitting diode (LED) includes forming an (LED) on a substrate, measuring a base emission characteristic of the formed LED, and selecting a phosphor based on the measured base emission characteristic of the formed LED such that a combined emission from the LED and the phosphor at least approximates white light. The method further includes introducing the selected phosphor onto the LED via, for example, inkjet printing.

Abstract: A method and system for manufacturing a light conversion structure for a light emitting diode (LED) is disclosed. The method includes forming a transparent, thermally insulating cover over an LED chip. The method also includes dispensing a conversion material onto the cover to form a conversion coating on the cover, and encapsulating the LED, the silicone cover, and the conversion coating within an encapsulant. Additional covers and conversion coatings can be added.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

Abstract: Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from an active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from a back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

Abstract: Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from an active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from a back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

Abstract: Integrated circuits and methods of redistributing bondpad locations are disclosed. In one implementation, a method of redistributing a bondpad location of an integrated circuit includes providing an integrated circuit comprising an inner lead bondpad. A first insulative passivation layer is formed over the integrated circuit. A bondpad-redistribution line is formed over the first insulative passivation layer and in electrical connection with the inner lead bondpad through the first insulative passivation layer. The bondpad-redistribution line includes an outer lead bondpad area. A second insulative passivation layer is formed over the integrated circuit and the bondpad-redistribution line. The second insulative passivation layer is formed to have a sidewall outline at least a portion of which is proximate to and conforms to at least a portion of the bondpad-redistribution line. Other aspects and implementations are contemplated.

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.