Patents by Inventor Che Lin

Che Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230092072
    Abstract: A method of detecting misprints obtains a reference image of perfectly-formed characters and a test image showing the same characters. First image processing is performed on the reference image to obtain a first image, and first image processing is performed on the test image to obtain a second image. A second image processing is performed on the first image to obtain a first outline image of each of first characters in the reference image, and the second image processing is performed on the second image to obtain a second outline image of each of second characters in the test image. A corresponding first outline image is determined for the second outline image. A similarity between the corresponding first outline image and the second outline image is calculated. Accordingly, a detection result of the second outline image is determined. The method can detect character flaw accurately.
    Type: Application
    Filed: May 19, 2022
    Publication date: March 23, 2023
    Inventors: CHENG-FENG WANG, LI-CHE LIN
  • Publication number: 20230065045
    Abstract: A method and structure for forming a semiconductor device includes etching back a source/drain contact to define a substrate topography including a trench disposed between adjacent hard mask layers. A contact etch stop layer (CESL) is deposited along sidewall and bottom surfaces of the trench, and over the adjacent hard mask layers, to provide the CESL having a snake-like pattern disposed over the substrate topography. A contact via opening is formed in a dielectric layer disposed over the CESL, where the contact via opening exposes a portion of the CESL within the trench. The portion of the CESL exposed by the contact via opening is etched to form an enlarged contact via opening and expose the etched back source/drain contact. A metal layer is deposited within the enlarged contact via opening to provide a contact via in contact with the exposed etched back source/drain contact.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Shih-Che LIN, Chao-Hsun WANG, Chia-Hsien YAO, Fu-Kai YANG, Mei-Yun WANG
  • Patent number: 11594974
    Abstract: A power conversion device includes a power supply, a converter, a current detection circuit, and a control circuit. The power supply includes positive and negative terminals. The converter includes a primary side and a secondary side. The converter is configured to output a first current to a load. The primary side is electrically connected to the positive terminal and the negative terminal of the power supply in parallel. The secondary side is electrically connected to the positive terminal of the power supply and the load in series. The current detection circuit is coupled between the secondary side and the load, and is configured to detect the first current to output a current detection signal. The control circuit is coupled to the current detection circuit for outputting a control signal to the converter according to the current detection signal and a reference current signal.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 28, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wang-Che Lin, Miao-Jen Cheng
  • Publication number: 20230048829
    Abstract: Semiconductor structures and methods are provided. An exemplary method according to the present disclosure includes receiving a fin-shaped structure comprising a first channel region and a second channel region, a first and a second dummy gate structures disposed over the first and the second channel regions, respectively. The method also includes removing a portion of the first dummy gate structure, a portion of the first channel region and a portion of the substrate under the first dummy gate structure to form a trench, forming a hybrid dielectric feature in the trench, removing a portion of the hybrid dielectric feature to form an air gap, sealing the air gap, and replacing the second dummy gate structure with a gate stack after sealing the air gap.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 16, 2023
    Inventors: Kai-Hsuan Lee, Shih-Che Lin, Po-Yu Huang, Shih-Chieh Wu, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11580730
    Abstract: A method for image-guided agriculture includes receiving images; processing the images to generate reflectance maps respectively corresponding to spectral bands; synthesizing the reflectance maps to generate a multispectral image including vegetation index information of a target area; receiving crop information in regions of the target area; and assessing crop conditions for the regions based on the identified crop information and the vegetation index information.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: February 14, 2023
    Assignee: GEOSAT Aerospace & Technology
    Inventors: Cheng-Fang Lo, Kuang-Yu Chen, Te-Che Lin, Hsiu-Hsien Wen, Ting-Jung Chang
  • Publication number: 20230043408
    Abstract: An image generation method obtains an original image. A character area, a background area, and a position of each flawless character in the original image are determined. The character area is segmented to obtain a first image of each flawless character. A background is removed from the first image to obtain a second image. First image processing is performed on the second image to obtain a third image. Second image processing is performed on the second image to obtain fourth images. Third image processing is performed on the fourth images respectively to obtain fifth images. A similarity between each fifth image and the third image is calculated. When the similarity is greater than a defect threshold, a background image is segmented. Brightness of the background image is adjusted. The target fourth image and adjusted background image are synthesized. The method can generate images with defective characters quickly.
    Type: Application
    Filed: June 2, 2022
    Publication date: February 9, 2023
    Inventors: CHENG-FENG WANG, PO-CHUNG WANG, LI-CHE LIN
  • Publication number: 20230041666
    Abstract: An autonomous water quality sensing apparatus, a system and a method for operating the apparatus are provided. In the autonomous water quality sensing system, the autonomous water quality sensing apparatus is configured to move on a track. In the method, a driving mechanism is used to drive the autonomous water quality sensing apparatus to operate over an elevated track surrounding one or more pools. The autonomous water quality sensing apparatus includes a sensing device. The sensor is put into the pool at a planned stop by a sensor deploying mechanism of the autonomous water quality sensing apparatus, so as to obtain water quality data of each of the pools according to a routing plan and a length setting.
    Type: Application
    Filed: August 3, 2021
    Publication date: February 9, 2023
    Inventor: CHIH-CHE LIN
  • Patent number: 11566954
    Abstract: The disclosure relates to a force measurement device including central portion, fixing portion, first and second sensing portions, and first and second electromechanical elements. The first sensing portion has first natural frequency. The first sensing portion is connected to the central portion. The second sensing portion has a second natural frequency. The second sensing portion is connected to the first sensing portion and the fixing portion. The first electromechanical element is disposed on the first sensing portion to measure a first vibration amplitude. The second electromechanical element is disposed on the second sensing portion to measure a second vibration amplitude. When the central portion is subjected to a first force, the first vibration amplitude is larger than the second vibration amplitude. When the central portion is subjected to a second force, the first vibration amplitude is smaller than the second vibration amplitude.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: January 31, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Che Lin, Chih-Yuan Chen, Chung-Yuan Su, Chao-Ta Huang
  • Publication number: 20230023611
    Abstract: A method of identifying characters in images extracts features of a detection image including characters. Enhancement processing is performed on the detection image according to the features to obtain an enhanced image. Closed edges of the characters are detected in the enhanced image. First rectangular outlines of the characters are determined according to the closed edges. The first rectangular outlines are corrected to obtain second rectangular outlines. The characters are cropped from the detection image according to the second rectangular outlines. The method identifies characters in images accurately and rapidly.
    Type: Application
    Filed: May 18, 2022
    Publication date: January 26, 2023
    Inventors: CHENG-FENG WANG, LI-CHE LIN, HUI-XIAN YANG
  • Publication number: 20230005280
    Abstract: A method of recognizing target objects in images obtains a detection image of a target object. A template image is generated according to the target object. The detection image is compared with the template image to obtain a comparison result. Candidate regions of the target object are determined in the detection image according to the comparison result. At least one target region of the target object is obtained from the candidate regions. The method detects target objects in images very rapidly.
    Type: Application
    Filed: May 18, 2022
    Publication date: January 5, 2023
    Inventors: CHENG-FENG WANG, HUI-XIAN YANG, LI-CHE LIN
  • Publication number: 20230004287
    Abstract: In a field of electronic device technologies, a human-computer interaction method and device relates to a portable device receiving a first touch operation performed on a first image, where the first touch operation is directly performed on an area outside a first functional area, and the first functional area is a functional area in the first image. The portable device sends first data to a large-screen device, where the first data includes image data generated by the portable device in response to a second touch operation, the second touch operation is an operation that is generated based on the first touch operation and that is directly performed on the first functional area, and the first data is used by the large-screen device to update the second image.
    Type: Application
    Filed: September 9, 2022
    Publication date: January 5, 2023
    Inventors: Che LIN, Yiyang ZHOU, Kai ZHANG
  • Patent number: 11545907
    Abstract: A power conversion device includes a power supply, a converter, a current detection circuit, and a control circuit. The power supply includes positive and negative terminals. The converter includes a primary side and a secondary side. The converter is configured to output a first current to a load. The primary side is electrically connected to the positive terminal and the negative terminal of the power supply in parallel. The secondary side is electrically connected to the positive terminal of the power supply and the load in series. The current detection circuit is coupled between the secondary side and the load, and is configured to detect the first current to output a current detection signal. The control circuit is coupled to the current detection circuit for outputting a control signal to the converter according to the current detection signal and a reference current signal.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: January 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wang-Che Lin, Miao-Jen Cheng
  • Patent number: 11538525
    Abstract: Provided is a resetting method of a resistive random access memory (RRAM) including the following steps. A first resetting operation and a first verifying operation on the at least one resistive memory cell are performed. Whether to perform a second resetting operation according to a verifying result of the first verifying operation is determined. A second verifying operation is performed after the second resetting operation is determined to be performed and is finished. To determine whether to perform a healing resetting operation according to a verifying result of the second verifying operation, which comprises: performing the healing resetting operation when a verifying current of the second verifying operation is greater than a predetermined current, wherein a resetting voltage of the healing resetting operation is greater than a resetting voltage of the second resetting operation.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: December 27, 2022
    Assignee: Winbond Electronics Corp.
    Inventors: Ping-Kun Wang, Ming-Che Lin, Yu-Ting Chen, Chang-Tsung Pai, Shao-Ching Liao, Chi-Ching Liu
  • Patent number: 11532561
    Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Che Lin, Po-Yu Huang, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang, Rueijer Lin, Wei-Jung Lin, Chen-Yuan Kao
  • Patent number: 11522001
    Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The plurality of photo sensitive regions are in the semiconductor substrate. The dielectric layer is on a backside surface of the semiconductor substrate facing away from the plurality of photo sensitive regions. The grid structure is on a backside surface of the dielectric layer facing away from the semiconductor substrate. The grid structure includes a plurality of grid lines spaced from each other. The plurality of convex dielectric lenses are alternately arranged with the plurality of grid lines of the grid structure on the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are lower than top ends of the plurality of grid lines of the grid structure.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shiu-Ko Jangjian, Chih-Nan Wu, Chun-Che Lin, Yu-Ku Lin
  • Patent number: 11520189
    Abstract: A display device includes a plurality of transparent voltage-dividing common electrodes and a plurality of pixel units. The transparent voltage-dividing common electrodes are electrically isolated from each other in a first direction. Each of the pixel units includes a first pixel electrode, a second pixel electrode, and a voltage-dividing switch. The first pixel electrode is configured to receive a data voltage. The second pixel electrode is configured to receive the data voltage. The voltage-dividing switch is configured to divide the data voltage on the second pixel electrode to one of the transparent voltage-dividing common electrodes.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: December 6, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Sheng-Ju Ho, Cheng-Han Tsao, Shang-Jie Wu, Yi-Jung Chen, Hung-Che Lin, Shun-Ling Hou, Nai-Wen Chang
  • Publication number: 20220382174
    Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chun HSIEH, Chih-Che LIN, Pei-Yi SU
  • Patent number: 11508822
    Abstract: A source/drain is disposed over a substrate. A source/drain contact is disposed over the source/drain. A first via is disposed over the source/drain contact. The first via has a laterally-protruding bottom portion and a top portion that is disposed over the laterally-protruding bottom portion.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: November 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang
  • Publication number: 20220367623
    Abstract: A semiconductor device structure includes nanostructures formed over a substrate. The structure also includes a gate structure formed over and around the nanostructures. The structure also includes a spacer layer formed over a sidewall of the gate structure over the nanostructures. The structure also includes a source/drain epitaxial structure formed adjacent to the spacer layer. The structure also includes a contact structure formed over the source/drain epitaxial structure with an air spacer formed between the spacer layer and the contact structure.
    Type: Application
    Filed: November 19, 2021
    Publication date: November 17, 2022
    Inventors: Kai-Hsuan Lee, Shih-Che Lin, Po-Yu Huang, Shih-Chieh Wu, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20220359399
    Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 10, 2022
    Inventors: Shih-Che Lin, Po-Yu Huang, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang, Rueijer Lin, Wei-Jung Lin, Chen-Yuan Kao