Patents by Inventor Chee Hiong Chew
Chee Hiong Chew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170133302Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.Type: ApplicationFiled: January 25, 2017Publication date: May 11, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, Soon Wei WANG, Chee Hiong CHEW
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Publication number: 20170117211Abstract: A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.Type: ApplicationFiled: April 8, 2016Publication date: April 27, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chee Hiong CHEW, Atapol PRAJUCKAMOL, Yushuang YAO
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Publication number: 20170110843Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.Type: ApplicationFiled: December 28, 2016Publication date: April 20, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chee Hiong CHEW, Atapol PRAJUCKAMOL, Yusheng LIN
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Patent number: 9620877Abstract: A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape.Type: GrantFiled: May 4, 2015Date of Patent: April 11, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN ALIGNMENT STRUCTURE IN BACKSIDE OF A SEMICONDUCTOR DIE
Publication number: 20170084545Abstract: A semiconductor device has a semiconductor die containing a base material having an active surface and a back surface opposite the active surface. A portion of the base material is removed by plasma etching to form an alignment recess in the base material. Alternatively, an alignment protrusion is formed over the base material. The alignment recess or alignment protrusion make a non-uniform surface. The semiconductor die is disposed over a substrate with a portion of the substrate, such as a die pad, positioned within the alignment recess. The die pad may be disposed partially or completely within the alignment recess of the base material. The base material may extend beyond the die pad, or the alignment recess or alignment protrusion may extend a length of the base material. A metal layer can be formed in the alignment recess of the base material.Type: ApplicationFiled: July 25, 2016Publication date: March 23, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Michael J. SEDDON, Francis J. CARNEY, Chee Hiong CHEW, Soon Wei WANG -
Publication number: 20170062310Abstract: In one embodiment, methods for making semiconductor devices are disclosed.Type: ApplicationFiled: September 1, 2015Publication date: March 2, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Swee Har KHOR, Tian Hing LIM, Hui Min LER, Chee Hiong CHEW, Phillip CELAYA
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Patent number: 9570832Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.Type: GrantFiled: March 19, 2015Date of Patent: February 14, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chee Hiong Chew, Atapol Prajuckamol, Yusheng Lin
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Publication number: 20160343683Abstract: A semiconductor package includes: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die. The pin includes a reversibly elastically deformable lower portion, which in implementations includes a spring, configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate. The pin is fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate. In implementations the pin includes two rigid portions coupled together only with a coil spring, the spring biasing the rigid portions away from one another when the housing is lowered towards the substrate.Type: ApplicationFiled: August 5, 2016Publication date: November 24, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng LIN, Chee Hiong CHEW, Francis J. CARNEY
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Publication number: 20160276772Abstract: A press-fit pin for a semiconductor package includes a shaft terminating in a head. A pair of arms extends away from a center of the head. Each arm includes a curved shape and the arms together form an s-shape. A length of the s-shape is longer than the shaft diameter. An outer extremity of each arm includes a contact surface configured to electrically couple to and form a friction fit with a pin receiver. In implementations the press-fit pin has only two surfaces configured to contact an inner sidewall of the pin receiver and is configured to contact the inner sidewall at only two locations. The shaft may be a cylinder. The s-shape formed by the pair of arms is visible from a view facing a top of the press-fit pin along a direction parallel with the longest length of the shaft. Versions include a through-hole extending through the head.Type: ApplicationFiled: March 19, 2015Publication date: September 22, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chee Hiong CHEW, Atapol PRAJUCKAMOL, Yusheng LIN
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Patent number: 9431311Abstract: A semiconductor package includes: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die. The pin includes a reversibly elastically deformable lower portion, which in implementations includes a spring, configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate. The pin is fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate. In implementations the pin includes two rigid portions coupled together only with a coil spring, the spring biasing the rigid portions away from one another when the housing is lowered towards the substrate.Type: GrantFiled: February 19, 2015Date of Patent: August 30, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Chee Hiong Chew, Francis J. Carney
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Publication number: 20160247735Abstract: A semiconductor package includes: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die. The pin includes a reversibly elastically deformable lower portion, which in implementations includes a spring, configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate. The pin is fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate. In implementations the pin includes two rigid portions coupled together only with a coil spring, the spring biasing the rigid portions away from one another when the housing is lowered towards the substrate.Type: ApplicationFiled: February 19, 2015Publication date: August 25, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yusheng Lin, Chee Hiong Chew, Francis J. Carney
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Publication number: 20160240452Abstract: A semiconductor device package includes a substrate having first and second opposing surfaces. A first surface of a die couples to the second surface of the substrate, and a first surface of an electrically conductive sub-terminal electrically couples with an electrical contact of the die and physically couples to the second surface of the substrate. A mold compound encapsulates the die and a majority of the sub-terminal. In implementations a first surface of the mold compound is coupled to the second surface of the substrate and a second surface of the mold compound opposing the first surface of the mold compound is flush with a second surface of the sub-terminal opposing the first surface of the sub-terminal. In implementations the sub-terminal includes a pillar having a longest length perpendicular to a longest length of the substrate. In implementations an electrically conductive pin couples to the second surface of the sub-terminal.Type: ApplicationFiled: February 18, 2015Publication date: August 18, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Atapol Prajuckamol, Chee Hiong Chew, Azhar Aripin
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Publication number: 20150364847Abstract: A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape.Type: ApplicationFiled: May 4, 2015Publication date: December 17, 2015Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
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Publication number: 20150189772Abstract: In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package.Type: ApplicationFiled: December 12, 2014Publication date: July 2, 2015Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
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Patent number: 8519521Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.Type: GrantFiled: August 20, 2012Date of Patent: August 27, 2013Assignee: Semiconductor Components Industries, LLCInventors: Shutesh Krishnan, Chee Hiong Chew, Jatinder Kumar
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Publication number: 20120306066Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.Type: ApplicationFiled: August 20, 2012Publication date: December 6, 2012Inventors: Shutesh Krishnan, Chee Hiong Chew, Jatinder Kumar
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Patent number: 8268676Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.Type: GrantFiled: January 29, 2010Date of Patent: September 18, 2012Assignee: Semiconductor Components Industries, LLCInventors: Shutesh Krishnan, Chee Hiong Chew, Jatinder Kumar
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Publication number: 20110115061Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.Type: ApplicationFiled: January 29, 2010Publication date: May 19, 2011Inventors: Shutesh Krishnan, Chee Hiong Chew, Jatinder Kumar
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Patent number: D755741Type: GrantFiled: February 18, 2015Date of Patent: May 10, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao
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Patent number: D755742Type: GrantFiled: February 18, 2015Date of Patent: May 10, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao