Abstract: The present invention pertains to a polarization independent tunable acousto-optical filter and the corresponding method. The filter diffracts an input light beam into a first input light beam unaffected by acoustic waves and a second input light beam affected by acoustic waves. A polarization beam displacer/combiner is employed to separate the input light beam into two orthogonal beams. Several polarized rotators are used to rotate the polarization of light by 90 degrees. An acousto-optical device makes the polarization of light with a particular wavelength rotate by 90 degrees. The two beams are then properly combined to form orthogonal beams. The filtering method has nothing to do with the polarization of the incident light. The filter has such advantages as a high extinction ratio, a small volume and a lower cost.

Abstract: The present invention pertains to a polarization independent tunable acousto-optical filter and the corresponding method. The filter diffracts an input light beam into a first input light beam unaffected by acoustic waves and a second input light beam affected by acoustic waves. A polarization beam displacer/combiner is employed to separate the input light beam into two orthogonal beams. Several polarized rotators are used to rotate the polarization of light by 90 degrees. An acousto-optical device makes the polarization of light with a particular wavelength rotate by 90 degrees. The two beams are then properly combined to form orthogonal beams. The filtering method has nothing to do with the polarization of the incident light. The filter has such advantages as a high extinction ratio, a small volume and a lower cost.

Abstract: The invention provides an optical circulator that comprises three ports with the property that light entered through the nth port is output through the (n+1)th port. It can be applied to optical fiber transmission of optical signals. It uses a reflector to make a two-core fiber collimator to be a first port and a second port of the optical circulator so as to minimize the optical circulator volume and to simplify the assembly procedure. A reciprocal crystal and a non-reciprocal crystal are combined to form an optical polarization controller to conquer such technical problems as the conjugate angle of the two-core collimator and the minimal polarization mode dispersion. In particular, the corresponding relation between the Faraday rotator and the birefringent crystal optical axis can be utilized to remove half-wave plates used in ordinary optical circulators, thus lowering manufacturing costs and complexities.

Abstract: A method of manufacturing metallic interconnects capable of reducing internal stress inside the metallic layer. The method comprises the steps of forming a silicon-rich oxide layer both before and after the formation of a metallic layer. Therefore, the metallic layer is fully enclosed by silicon-rich oxide layers and any direct contact between the metallic layer and any silicon dioxide layer is avoided. Since the quantity of silicon in the silicon-rich oxide layer is much higher than in a silicon dioxide layer, bonds formed between a silicon atom and an oxygen atom in the silicon-rich oxide layer are much stronger. Consequently, the chance for an aluminum atom in the metallic layer to react with an oxygen atom in the silicon-rich oxide layer is greatly reduced. Hence, lattice vacancies/voids that can lead to conventional stress migration and thermal induced migration problems are prevented.

Abstract: The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises following steps: provide a substrate that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forms a composite layer on the substrate, herein the composite layer at least also covers both sensor area and transistor area, and the composite layer increases refractive index of light that propagate from the doped region into the composite layer; performs an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performs a salicide process to let top of the gate, the source and the drain are covered by a silicate.

Abstract: A method of manufacturing a mask ROM. A sacrificial silicon oxide layer is formed on the active region upon the substrate. Patterning the sacrificial silicon oxide layer in order to form a plurality of parallel openings, thereby exposing a portion of the active region. A polysilicon layer is formed on the openings and openings are formed thereon. An ion implantation process is performed on the polysilicon layer. Using a thermal flow process, the ions within the polysilicon layer are driven through the openings into the lower portion of the substrate, thereby forming an ion doping region. The polysilicon layer is etchbacked until the sacrificial silicon oxide layer is exposed. The sacrificial silicon oxide layer is removed.

Abstract: The Pd/Al2O3 catalyst displayed significant activity towards conversion of NO into N2 and O2 at T>1050° K. On modifying the catalyst with NaOH, the required operation temperature may be lowered to 900° K. The modified Pd/Al2O3 may be used in stationary factories and power stations, as well as catalytic converters for abatement of NOx emission. Calorimetric and temperature-programmed-desorption studies revealed that observed catalytic activity at 900° K. resulted from a formation of interfacial sites which strongly adsorb NO molecules.

Abstract: The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises following steps: provide a substrate that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forms a composite layer on the substrate, herein the composite layer at least also covers both sensor area and transistor area, and the composite layer increases refractive index of light that propagate from the doped region into the composite layer; performs an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performs a salicide process to let top of the gate, the source and the drain are covered by a silicate.

Abstract: A method of manufacturing the metallic electrodes of a capacitor in a mixed mode semiconductor device. The method comprises the steps of providing a substrate having a conductive layer and the lower electrode of a capacitor formed thereon, and then depositing a dielectric layer over the substrate. A first opening and a second opening are then formed in the dielectric layer. The first opening exposes a portion of the conductive layer while the second opening exposes a portion of the lower electrode. Finally, a conductive plug and the upper electrode of the capacitor are formed in the respective first and second openings that are in corresponding positions above the conductive layer and lower electrode, respectively.

Abstract: A method for fabricating a crack resistant inter-layer dielectric for a salicide process. The method includes forming an insulating layer on a provided substrate, forming a planarized inter-layer dielectric layer on the insulating layer, and performing a short-duration thermal treatment to increase the density of the inter-layer dielectric layer.

Abstract: A method of fabricating a MOS transistor. An undoped multi-layer stacked polysilicon structure is formed on a gate oxide layer and then being doped to increase conductivity. After that, the multi-layer stacked polysilicon structure and the gate oxide layer are patterned to form a gate electrode. A source/drain region is formed by ion implantation with the gate electrode as a mask.

Abstract: A method of forming metallic capacitor. The method includes forming a lower electrode for forming the capacitor and a metal conductive line over an inter-layer dielectric such that there are gaps between and on the sides of the lower electrode and the metal conductive line. Thereafter, a first oxide layer is formed that fills the gap, and then a second oxide layer is formed over the inter-layer dielectric. The second oxide layer is later patterned to form a cap oxide layer having an opening that exposes a portion of the lower electrode. Subsequently, a thin dielectric layer is formed over the lower electrode and the cap oxide layer. Finally, an upper electrode is formed over the thin dielectric layer filling the opening.

Abstract: A process for fabricating a mixed signal integrated circuit on a substrate, wherein the substrate is partially covered with a field oxide layer. An oxide layer is formed over a portion of the substrate, wherein the portion of the substrate is not covered with the field oxide layer. First impurities are implanted into the substrate, wherein the first impurities damage the oxide layer. A buffer layer is formed over the oxide layer. A polysilicon layer is formed over the buffer layer. Second impurities are implanted into the polysilicon layer, wherein the buffer layer prevents the oxide layer form being damaged by the second impurities. The polysilicon layer is etched to remove the polysilicon layer, wherein the buffer layer prevents the oxide layer and the substrate from being etched. The portion of buffer layer and the damaged oxide layer over the substrate are removed. The gate oxide layer is formed over the substrate.