Patents by Inventor Chen Chao

Chen Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11515249
    Abstract: At least some embodiments of the present disclosure relate to a wiring structure and a method for manufacturing a wiring structure. The wiring structure includes a conductive structure, a first fan-out structure, and a second fan-out structure. The first fan-out structure is disposed on the conductive structure and includes a first circuit layer. The second fan-out structure is disposed on the conductive structure, and includes a second circuit layer. A thickness of the first circuit layer is different from a thickness of the second circuit layer.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: November 29, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih-Yi Huang, Chen-Chao Wang, Mi-Chun Hung
  • Patent number: 11476816
    Abstract: An amplifier device and a duplexer circuit are provided. The amplifier device includes a first differential amplifier circuit and a controller. The first differential amplifier circuit includes first and second radio frequency (RF) input terminals, first and second transistors, first and second adjustable capacitor circuits, and first and second RF output terminals. The controller adjusts capacitance values of the first adjustable capacitor circuit of the first differential amplifier circuit and the second adjustable capacitor circuit of the first differential amplifier circuit according to at least one of a characteristic related to a first RF input signal of the first differential amplifier circuit, a characteristic related to the second RF input signal of the first differential amplifier circuit, a matching deviation between the first transistor and the second transistor of the first differential amplifier circuit, and a characteristic of the amplifier device.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: October 18, 2022
    Assignee: RichWave Technology Corp.
    Inventors: Yu-Chun Donald Lie, Chuan-Chen Chao
  • Patent number: 11450656
    Abstract: An anti-parallel diode device includes a first semiconductor, a second semiconductor, a third semiconductor, and a third diode. The first semiconductor is of a first conductivity type, and the second semiconductor and the third semiconductor are of a second conductivity type. The second semiconductor is in contact with the first semiconductor, so that the first semiconductor and the second semiconductor form a first diode. The third semiconductor is in contact with the first semiconductor, so that the first semiconductor and the third semiconductor form a second diode. A first terminal of the third diode is electrically connected to the first semiconductor. The first terminal of the third diode is of the second conductivity type.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: September 20, 2022
    Assignee: RichWave Technology Corp.
    Inventor: Chuan-Chen Chao
  • Patent number: 11424167
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: August 23, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chen-Chao Wang, Chih-Yi Huang, Keng-Tuan Chang
  • Patent number: 11416766
    Abstract: In an approach to detecting the transmission of messages, analyzing said messages, calculating a message risk score and transmitting a warning notification, one or more computer processors detect transmission of a message from a user to a selected recipient. The one or more computer processors extract message information from the detected message. The one or more computer processors retrieve one or more historical conversations between the user and the selected recipient of the detected message. The one or more computer processors determine a risk score corresponding to sending the detected message to the selected recipient based on applying the extracted message information and the retrieved historical conversations to a cognitive model.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: August 16, 2022
    Assignee: International Business Machines Corporation
    Inventors: Tzu-Chen Chao, Ching-Chun Liu, Ci-Wei Lan, Tao-Hung Jung, Yu-Siang Chen
  • Patent number: 11328999
    Abstract: A semiconductor device package includes a lower-density substrate and a higher-density substrate. The higher-density substrate is attached to the lower-density substrate. The higher-density substrate has a first interconnection layer and a second interconnection layer disposed over the first interconnection layer. A thickness of the first interconnection layer is different from a thickness of the second interconnection layer.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: May 10, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Fu-Chen Chu, Hung-Chun Kuo, Chen-Chao Wang
  • Publication number: 20220139824
    Abstract: At least some embodiments of the present disclosure relate to a wiring structure and a method for manufacturing a wiring structure. The wiring structure includes a conductive structure, a first fan-out structure, and a second fan-out structure. The first fan-out structure is disposed on the conductive structure and includes a first circuit layer. The second fan-out structure is disposed on the conductive structure, and includes a second circuit layer. A thickness of the first circuit layer is different from a thickness of the second circuit layer.
    Type: Application
    Filed: November 5, 2020
    Publication date: May 5, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Yi HUANG, Chen-Chao WANG, Mi-Chun HUNG
  • Publication number: 20220114203
    Abstract: Machine logic (for example, software) for performing the following operations: (i) receiving an unstructured data set including information indicative of unstructured data that includes a plurality of first independent parameter values corresponding to a first independent parameter a plurality of first dependent parameter values corresponding to a first dependent parameter; (ii) parsing the unstructured data to identify the first independent parameter, the plurality of first independent parameter values, the first dependent parameter and the plurality of first dependent parameter values; (iii) selecting a first type of graph, from among a plurality of graph types, for visually representing the relationship; and (iv) generating a first graph data set that can be used to display a first graph of the first type which visually represents the relationship.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 14, 2022
    Inventors: Tzu-Chen Chao, Juihsiang Huang, Shin Yu Wey, Po-Cheng Chiu
  • Publication number: 20220115276
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Chih-Yi HUANG, Keng-Tuan CHANG
  • Publication number: 20220116000
    Abstract: An amplifier device and a duplexer circuit are provided. The amplifier device includes a first differential amplifier circuit and a controller. The first differential amplifier circuit includes first and second radio frequency (RF) input terminals, first and second transistors, first and second adjustable capacitor circuits, and first and second RF output terminals. The controller adjusts capacitance values of the first adjustable capacitor circuit of the first differential amplifier circuit and the second adjustable capacitor circuit of the first differential amplifier circuit according to at least one of a characteristic related to a first RF input signal of the first differential amplifier circuit, a characteristic related to the second RF input signal of the first differential amplifier circuit, a matching deviation between the first transistor and the second transistor of the first differential amplifier circuit, and a characteristic of the amplifier device.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 14, 2022
    Applicant: RichWave Technology Corp.
    Inventors: Yu-Chun Donald Lie, Chuan-Chen Chao
  • Patent number: 11298459
    Abstract: A wearable medical device comprising an annular housing configured to attach to a wrist of a patient. The wearable medical device having a first receptacle attached to the annular housing for receiving a first portion of a tube of an intravenous delivery system. The wearable medical device comprising a flow regulator attached to the annular housing and in contact with the first portion of the tube, where the flow regulator is configured to modify a geometric characteristic of the first portion of the tube. The wearable medical device further comprising a wireless transmitter for communicating with a user console.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: April 12, 2022
    Assignee: International Business Machines Corporation
    Inventors: Jing Du, Tzu-Chen Chao, Ci-Wei Lan, Xiang Yu Yang, Chao Zhang, Xin Fang Hao
  • Patent number: 11270945
    Abstract: A semiconductor device includes a substrate, having a silicon layer on top. A device structure is disposed on the substrate. A dielectric layer is disposed on the substrate and covering over the device structure. The dielectric layer has a first air gap above the device structure. The first air gap is enclosed by a dielectric wall constituting as a part of the dielectric layer and the dielectric wall is disposed on the device structure. The dielectric layer has a second air gap, exposing a top of the device structure and adjacent to the dielectric wall.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: March 8, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chu Chun Chang, Yu Chen Chao
  • Patent number: 11232998
    Abstract: A semiconductor device package includes a substrate, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the substrate. The first circuit layer has a plurality of dielectric layers and a first through via penetrating the dielectric layers and electrically connected to the substrate. The second circuit layer is disposed on the first circuit layer. The second circuit layer has a plurality of dielectric layers and a second through via penetrating the dielectric layers and electrically connected to the first circuit layer.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: January 25, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Fong Jhong, Chen-Chao Wang, Hung-Chun Kuo
  • Patent number: 11222845
    Abstract: A semiconductor device includes a dielectric layer, a first conductive layer penetrating the dielectric layer, and a grounding structure disposed within the dielectric layer and adjacent to the first conductive layer. The dielectric layer has a first surface and a second surface opposite the first surface. The first conductive layer has a first portion and a second portion connected to the first portion. The first portion has a width greater than that of the second portion.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: January 11, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po-I Wu, Chen-Chao Wang
  • Patent number: 11222083
    Abstract: Systems, methods, and computer program products for implementing a web crawler platform comprising one or more containerized web crawler programs working in tandem to synergistically index web resources and reduce redundancy experienced by multiple web crawlers independently indexing overlapping web resources. The platform provides a URL namespace, allowing crawlers to register with the platform and create URL endpoints for other crawlers to discover existing crawlers registered to the platform and identify web resources previously indexed. The platform provides crawler to crawler communication and exchanges of data and metadata obtained from web resources that have been previously indexed, allowing for crawlers to share existing data or metadata without having to directly crawl through the web resource.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: January 11, 2022
    Assignee: International Business Machines Corporation
    Inventors: Chih-Hsiung Liu, Peter Wu, Tzu-Chen Chao, I-Chien Lin
  • Publication number: 20210391262
    Abstract: A semiconductor device includes a substrate, having a silicon layer on top. A device structure is disposed on the substrate. A dielectric layer is disposed on the substrate and covering over the device structure. The dielectric layer has a first air gap above the device structure. The first air gap is enclosed by a dielectric wall constituting as a part of the dielectric layer and the dielectric wall is disposed on the device structure. The dielectric layer has a second air gap, exposing a top of the device structure and adjacent to the dielectric wall.
    Type: Application
    Filed: July 31, 2020
    Publication date: December 16, 2021
    Applicant: United Microelectronics Corp.
    Inventors: Chu Chun Chang, Yu Chen Chao
  • Publication number: 20210361565
    Abstract: An oral pharmaceutical composition comprising telmapitant, a non-aqueous solvent and one or more additional pharmaceutical acceptable excipients wherein the telmapitant is in solution in the composition. A method of treatment or prevention of emesis in animals comprising administering the oral pharmaceutical composition.
    Type: Application
    Filed: December 20, 2018
    Publication date: November 25, 2021
    Applicant: Intervet Inc.
    Inventor: Chen-Chao Wang
  • Patent number: 11165249
    Abstract: A signal switching apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipating circuit. The signal control switch coupled between a first signal transceiving end and a second signal transceiving end is turned on or turned off according to a first control signal. The switch circuit having at least one first transistor is controlled by a second control signal to be turned on or off, and a first end of the switch circuit is coupled to the first signal transceiving end. The blocking capacitor is coupled between a second end of the switch circuit and a reference voltage terminal. The surge current dissipating circuit having at least one second transistor is coupled between the second end of the switch circuit and the reference voltage terminal. The second transistor is configured to dissipate a surge current and also turned off when operated normally.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: November 2, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Tsung-Han Lee, Chuan-Chen Chao
  • Publication number: 20210278457
    Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 9, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Tsung-Tang TSAI, Chih-Yi HUANG
  • Patent number: 11081548
    Abstract: A bipolar transistor includes a collector layer, a base layer on the collector layer, and a first elongated emitter mesa on the base layer having a long side and a short side, wherein the long side is parallel with a first direction, and n separate first emitter-contact structures disposed along the first direction on the first elongated emitter mesa, where n is an integer greater than one.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: August 3, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Chuan-Chen Chao, Po-Hsiang Yang