Patents by Inventor Chen Chao

Chen Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200043911
    Abstract: An anti-parallel diode device includes a first semiconductor, a second semiconductor, a third semiconductor, and a third diode. The first semiconductor is of a first conductivity type, and the second semiconductor and the third semiconductor are of a second conductivity type. The second semiconductor is in contact with the first semiconductor, so that the first semiconductor and the second semiconductor form a first diode. The third semiconductor is in contact with the first semiconductor, so that the first semiconductor and the third semiconductor form a second diode. A first terminal of the third diode is electrically connected to the first semiconductor. The first terminal of the third diode is of the second conductivity type.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 6, 2020
    Applicant: RichWave Technology Corp.
    Inventor: Chuan-Chen Chao
  • Publication number: 20200030596
    Abstract: A system for training visual acuity includes an audio player and a controller. The audio player includes a database which stores plural pieces of music, and a headphone with which a user listens to the pieces of music so as to stimulate a visual cortex of the user, where each of the pieces of music contains two audio frequency components that have a frequency difference therebetween ranging from 1 to 45 Hz. The controller is electrically connected to the audio player, and is configured to control the audio player to play the pieces of music.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 30, 2020
    Applicants: Eyeson Tech Ltd., Asia University
    Inventors: Shin-Da Lee, Chen-Chao Hsu, Hsin-Chin Chen, Chung-Hui Wang
  • Publication number: 20200028357
    Abstract: A signal switching apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipating circuit. The signal control switch coupled between a first signal transceiving end and a second signal transceiving end is turned on or turned off according to a first control signal. The switch circuit having at least one first transistor is controlled by a second control signal to be turned on or off, and a first end of the switch circuit is coupled to the first signal transceiving end. The blocking capacitor is coupled between a second end of the switch circuit and a reference voltage terminal. The surge current dissipating circuit having at least one second transistor is coupled between the second end of the switch circuit and the reference voltage terminal. The second transistor is configured to dissipate a surge current and also turned off when operated normally.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 23, 2020
    Applicant: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Tsung-Han Lee, Chuan-Chen Chao
  • Patent number: 10535521
    Abstract: A method of forming a semiconductor device package includes: (1) providing an electronic device including an active surface and a contact pad adjacent to the active surface; (2) forming a package body encapsulating portions of the electronic device; and (3) forming a redistribution stack, including: forming a dielectric layer over a front surface of the package body, the dielectric layer defining a first opening exposing at least a portion of the contact pad; and forming a redistribution layer (RDL) over the dielectric layer, the RDL including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: January 14, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: John Richard Hunt, William T. Chen, Chih-Pin Hung, Chen-Chao Wang
  • Publication number: 20200009321
    Abstract: A wearable medical device comprising an annular housing configured to attach to a wrist of a patient. The wearable medical device having a first receptacle attached to the annular housing for receiving a first portion of a tube of an intravenous delivery system. The wearable medical device comprising a flow regulator attached to the annular housing and in contact with the first portion of the tube, where the flow regulator is configured to modify a geometric characteristic of the first portion of the tube. The wearable medical device further comprising a wireless transmitter for communicating with a user console.
    Type: Application
    Filed: July 5, 2018
    Publication date: January 9, 2020
    Inventors: Jing Du, Tzu-Chen Chao, Ci-Wei Lan, Xiang Yu Yang, Chao Zhang, Xin Fang Hao
  • Patent number: 10515806
    Abstract: A semiconductor device package includes: (1) an electronic device including an active surface and a contact pad adjacent to the active surface; and (2) a redistribution stack including a dielectric layer disposed over the active surface and defining a first opening exposing at least a portion of the contact pad; and a redistribution layer (RDL) disposed over the dielectric layer and including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and the maximum width of the second portion of the first trace is no greater than 3 times of a width of the first portion of the first trace, wherein the sec
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: December 24, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: John Richard Hunt, William T. Chen, Chih-Pin Hung, Chen-Chao Wang
  • Publication number: 20190244602
    Abstract: A network device is connected to user device and includes a processor and a memory storing executable code executed by the processor. The network device is configured to receive first keyword data and speech data followed by the first keyword data; determine whether the first keyword data corresponds to a first keyword; in response to determining that the first keyword data corresponds to the first keyword, recognize word information from the speech data to generate at least one word recognition result; send the at least one word recognition result through a first communication path to a first network; and in response to determining that the first keyword data corresponds to a second keyword, stop recognizing the word information from the speech data followed by the first keyword data, and send the speech data through a second communication path to the first user device.
    Type: Application
    Filed: November 15, 2018
    Publication date: August 8, 2019
    Inventors: YEE-LEE SHYONG, CHEN-CHAO CHANG, YING-HUI LIANG
  • Publication number: 20190229532
    Abstract: A switch apparatus is provided. The switch apparatus includes a signal control switch, a switch circuit, a blocking capacitor and a surge current dissipation circuit. The signal control switch and the switch circuit are respectively controlled by a first control signal and a second control signal to be turned on or off. The blocking capacitor is serially coupled between the switch circuit and a reference voltage end. The surge current dissipation circuit includes a Zener diode circuit or at least one diode circuit, and the at least one diode circuit has one or more diodes coupled in series. The one or more diodes coupled in series are coupled between two ends of the surge current dissipation circuit according to a first polarity direction.
    Type: Application
    Filed: October 24, 2018
    Publication date: July 25, 2019
    Applicant: RichWave Technology Corp.
    Inventor: Chuan-Chen Chao
  • Publication number: 20190221530
    Abstract: An integrated circuit and a transmission circuit thereof are provided. The transmission circuit includes an input buffer and a voltage holding circuit. The voltage holding circuit has a first end coupled to the input end of the input buffer, and a second end coupled to a reference voltage end. The voltage holding circuit includes a switch and a diode apparatus coupled in series between the first end and the second end of the voltage holding circuit. The switch is configured to receive a mode signal, and is turned on or cut off according to the mode signal.
    Type: Application
    Filed: April 19, 2018
    Publication date: July 18, 2019
    Applicant: RichWave Technology Corp.
    Inventors: Chuan-Chen Chao, E-Jen Lien
  • Publication number: 20190214337
    Abstract: A substrate includes: (1) a first patterned conductive layer, the first patterned conductive layer including a pair of first transmission lines adjacent to each other; and (2) a first reference layer above the pair of first transmission lines, the first reference layer defining an opening, wherein the pair of first transmission lines are exposed to the opening.
    Type: Application
    Filed: March 18, 2019
    Publication date: July 11, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuan-Hsi CHOU, Tsun-Lung HSIEH, Chen-Chao WANG
  • Publication number: 20190206683
    Abstract: A semiconductor device package includes: (1) an electronic device including an active surface and a contact pad adjacent to the active surface; and (2) a redistribution stack including a dielectric layer disposed over the active surface and defining a first opening exposing at least a portion of the contact pad; and a redistribution layer (RDL) disposed over the dielectric layer and including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and the maximum width of the second portion of the first trace is no greater than 3 times of a width of the first portion of the first trace, wherein the sec
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: John Richard HUNT, William T. Chen, Chih-Pin HUNG, Chen-Chao WANG
  • Publication number: 20190206684
    Abstract: A method of forming a semiconductor device package includes: (1) providing an electronic device including an active surface and a contact pad adjacent to the active surface; (2) forming a package body encapsulating portions of the electronic device; and (3) forming a redistribution stack, including: forming a dielectric layer over a front surface of the package body, the dielectric layer defining a first opening exposing at least a portion of the contact pad; and forming a redistribution layer (RDL) over the dielectric layer, the RDL including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: John Richard HUNT, William T. Chen, Chih-Pin HUNG, Chen-Chao WANG
  • Patent number: 10276382
    Abstract: A semiconductor device package includes an electronic device and a redistribution stack. The redistribution stack includes a dielectric layer disposed over an active surface of the electronic device and defining an opening exposing at least a portion of a contact pad of the electronic device. The redistribution stack also includes a redistribution layer disposed over the dielectric layer and including a trace. A first portion of the trace extends over the dielectric layer along a longitudinal direction adjacent to the opening, and a second portion of the trace is disposed in the opening and extends between the first portion of the trace and the exposed portion of the contact pad. The second portion of the trace has a maximum width along a transverse direction orthogonal to the longitudinal direction, and the maximum width of the second portion of the trace is no greater than about 3 times of a width of the first portion of the trace.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: April 30, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: John Richard Hunt, William T. Chen, Chih-Pin Hung, Chen-Chao Wang
  • Patent number: 10270244
    Abstract: An ESD protection circuit includes an input port, a resistor, a BJT, and a diode. The BJT has an emitter, a base, and a collector. The emitter of the BJT is coupled to the input port. The base of the BJT is coupled through the resistor to the input port. The diode has a first terminal and a second terminal. The first terminal of the diode is the collector of the BJT. The second terminal of the diode is coupled to a supply voltage.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: April 23, 2019
    Assignee: RichWave Technology Corp.
    Inventor: Chuan-Chen Chao
  • Publication number: 20190103386
    Abstract: A semiconductor device package comprises a bottom electronic device, an interposer module, a top electronic device, and a double sided redistribution layer (RDL) structure. The interposer module includes a plurality of conductive vias. The top electronic device has an active surface and is disposed above the bottom electronic device and above the interposer module. The double sided RDL structure is disposed between the bottom electronic device and the top electronic device. The active surface of the bottom electronic device faces toward the double sided RDL structure. The active surface of the top electronic device faces toward the double sided RDL structure. The double sided RDL structure electrically connects the active surface of the bottom electronic device to the active surface of the top electronic device. The double sided RDL structure electrically connects the active surface of the top electronic device to the interposer module.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: William T. CHEN, John Richard HUNT, Chih-Pin HUNG, Chen-Chao WANG, Chih-Yi HUANG
  • Patent number: 10236240
    Abstract: In one or more embodiments, a substrate includes a patterned conductive layer and a reference layer. The patterned conductive layer includes a pair of first conductive traces, a pair of second conductive traces and a reference trace between the pair of first conductive traces and the pair of second conductive traces. The reference layer is above the patterned conductive layer and defines an opening.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: March 19, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuan-Hsi Chou, Tsun-Lung Hsieh, Chen-Chao Wang
  • Patent number: 10186779
    Abstract: Various embodiments of the present disclosure relate to a semiconductor device package including a carrier, an electrical component, an antenna, a conductive pad and a conductive line. The carrier includes a top surface. The electrical component is disposed over the top surface of the carrier. The antenna is disposed over the top surface of the carrier and spaced away from the electrical component. The conductive pad is disposed over the top surface of the carrier and beneath the antenna, wherein the conductive pad includes a resonant structure. The conductive line is electrically connected to the electrical component and extends within the carrier. A part of the conductive line is beneath the antenna and the resonant structure of the conductive pad.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: January 22, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yu Ho, Chen-Chao Wang, Chun-Yen Ting, Ming-Fong Jhong, Po-Chih Pan
  • Patent number: 9968617
    Abstract: The present invention provides formulations and methods useful in the control of ectoparasites on a domestic animal, using a formulation comprising Indoxacarb and a veterinarily acceptable carrier that is applied topically to 10% or less of the total surface area of a domestic animal. Other embodiments include these formulations also including one or more additional pesticides such as fipronil.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: May 15, 2018
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Frank Guerino, Keith Alan Freehauf, Roger Mervyn Sargent, Peter Andrew O'Neill, Robert D. Simmons, Chen-Chao Wang
  • Publication number: 20180131094
    Abstract: Various embodiments of the present disclosure relate to a semiconductor device package including a carrier, an electrical component, an antenna, a conductive pad and a conductive line. The carrier includes a top surface. The electrical component is disposed over the top surface of the carrier. The antenna is disposed over the top surface of the carrier and spaced away from the electrical component. The conductive pad is disposed over the top surface of the carrier and beneath the antenna, wherein the conductive pad includes a resonant structure. The conductive line is electrically connected to the electrical component and extends within the carrier. A part of the conductive line is beneath the antenna and the resonant structure of the conductive pad.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 10, 2018
    Inventors: Cheng-Yu HO, Chen-Chao WANG, Chun-Yen TING, Ming-Fong JHONG, Po-Chih PAN
  • Patent number: 9929304
    Abstract: An apparatus for forming a solar cell includes a housing defining a vacuum chamber, a rotatable substrate support, at least one inner heater and at least one outer heater. The substrate support is inside the vacuum chamber configured to hold a substrate. The at least one inner heater is between a center of the vacuum chamber and the substrate support, and is configured to heat a back surface of a substrate on the substrate support. The at least one outer heater is between an outer surface of the vacuum chamber and the substrate support, and is configured to heat a front surface of a substrate on the substrate support.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: March 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Edward Teng, Ying-Chen Chao, Chih-Jen Yang