Patents by Inventor Chen Hao

Chen Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250251629
    Abstract: A reflective display panel includes a first substrate, a second substrate, pixel structures, spacers, a first alignment layer, a second alignment layer, a liquid crystal layer, and light shielding patterns. The pixel structures are disposed on the first substrate. The spacers and the liquid crystal layer are disposed between the first and second substrates. The first alignment layer is disposed on the first substrate and has a first alignment direction. The second alignment layer is disposed on the second substrate and has a second alignment direction. Each spacer has a first side edge and a second side edge facing away from each other and sequentially arranged along the first or second alignment direction. In a stacking direction of the first and second substrates, each light shielding pattern overlaps with the second side edge of one of the spacers, but does not overlap with the first side edge thereof.
    Type: Application
    Filed: October 29, 2024
    Publication date: August 7, 2025
    Applicant: HannStar Display Corporation
    Inventors: Yu-Chi Chiao, Chen-Hao Su, Cheng-Yen Yeh, Hsuan-Chen Liu, Chih-Pin Lin, Ling Chih Kao
  • Publication number: 20250251630
    Abstract: A display panel includes a first substrate, a second substrate, a plurality of pixel structures, a plurality of color filter patterns, a plurality of spacers, and a liquid crystal layer. The pixel structures are disposed on the first substrate, and each pixel structure includes a reflective electrode. The color filter patterns respectively overlap the reflective electrodes of the pixel structures. The spacers and the liquid crystal layer are disposed between the first substrate and the second substrate. The pixel structures include a first pixel structure, the spacers include a first spacer, and the color filter patterns include a first color filter pattern. The reflective electrode of the first pixel structure of the pixel structures overlaps the first spacer of the spacers and the first color filter pattern of the color filter patterns, and at least a portion of the first spacer does not overlap the first color filter pattern.
    Type: Application
    Filed: November 5, 2024
    Publication date: August 7, 2025
    Applicant: HannStar Display Corporation
    Inventors: Yu-Chi Chiao, Chen-Hao Su, Cheng-Yen Yeh, Mu-Kai Kang, Chung Lin Chang
  • Publication number: 20250241075
    Abstract: A semiconductor device structure and a formation method are provided. The method includes receiving a substrate, and the substrate has a dielectric layer and a semiconductor layer over the dielectric layer. The method also includes forming a p-type doped region and an n-type doped region in the semiconductor layer. The method further includes partially removing the semiconductor layer and the dielectric layer to form a recess exposing portions of the p-type doped region and the n-type doped region. In addition, the method includes forming a photo-sensing structure over sidewalls of the recess, and the photo-sensing structure is spaced apart from a bottom of the recess.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 24, 2025
    Inventors: Chen-Hao CHIANG, Li-Weng CHANG, Jiun-Yi WU, Chen-Hua YU
  • Publication number: 20250241086
    Abstract: A semiconductor device structure and a formation method are provided. The method includes forming a p-type doped structure and an n-type doped structure. The method also includes forming a photo-sensing structure, and a portion of the photo-sensing structure is between the p-type doped structure and the n-type doped structure. The method further includes forming a semiconductor cap over the photo-sensing structure. The semiconductor cap is p-type doped.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 24, 2025
    Inventors: Chen-Hao CHIANG, Li-Weng CHANG, Jiun-Yi WU, Chen-Hua YU
  • Patent number: 12369352
    Abstract: A method of forming a semiconductor device includes: forming an etch stop layer over a substrate; forming a first diffusion barrier layer over the etch stop layer; forming a semiconductor device layer over the first diffusion barrier layer, the semiconductor device layer including a transistor; forming a first interconnect structure over the semiconductor device layer at a front side of the semiconductor device layer, the first interconnect structure electrically coupled to the transistor; attaching the first interconnect structure to a carrier; removing the substrate, the etch stop layer, and the first diffusion barrier layer after the attaching; and forming a second interconnect structure at a backside of the semiconductor device layer after the removing.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Eugene I-Chun Chen, Ru-Liang Lee, Chia-Shiung Tsai, Chen-Hao Chiang
  • Publication number: 20250230851
    Abstract: An apparatus is provided. The apparatus includes an equipment support structure configured to support a semiconductor fabrication component. The apparatus includes a damper assembly configured to resist a lateral force induced by a seismic event to the equipment support structure. The damper assembly includes a gear rack coupled to the equipment support structure. The damper assembly includes a first flywheel assembly including a first mass damper flywheel and a first gear meshed with the gear rack and selectively engaged with the first mass damper flywheel.
    Type: Application
    Filed: January 12, 2024
    Publication date: July 17, 2025
    Inventors: Chen Hao LIAO, Chih-Tsung LEE, Ming-Yi LIN, Cheng-Lung WU, Jiun-Rong PAI
  • Patent number: 12362281
    Abstract: Partial barrier-free vias and methods for forming such are disclosed herein. An exemplary interconnect structure of a multilayer interconnect feature includes a dielectric layer. A cobalt-comprising interconnect feature and a partial barrier-free via are disposed in the dielectric layer. The partial barrier-free via includes a first via plug portion disposed on and physically contacting the cobalt-comprising interconnect feature and the dielectric layer, a second via plug portion disposed over the first via plug portion, and a via barrier layer disposed between the second via plug portion and the first via plug portion. The via barrier layer is further disposed between the second via plug portion and the dielectric layer. The cobalt-comprising interconnect feature can be a device-level contact or a conductive line of the multilayer interconnect feature. The first via plug portion and the second via plug portion can include tungsten, cobalt, and/or ruthenium.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: July 15, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Ling Tsai, Shen-Nan Lee, Mrunal A. Khaderbad, Chung-Wei Hsu, Chen-Hao Wu, Teng-Chun Tsai
  • Publication number: 20250226359
    Abstract: A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.
    Type: Application
    Filed: January 4, 2024
    Publication date: July 10, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zheng-Yong LIANG, Yu-Yun PENG, Keng-Chu LIN, Wei-Ting YEH, Chia-Yun CHENG, Chen-Hao WU, Yu-Wei LU, Han-De CHEN, Hsu-Kai CHANG, Kuei-Lin CHAN, Kenichi SANO, Huang-Lin CHAO, Cheng-I CHU, Yi-Rui CHEN
  • Publication number: 20250228016
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate including a P-type region and an N-type region. The P-type region and the N-type region are spaced apart from each other. The semiconductor device structure includes a light absorption structure in the substrate between the P-type region and an N-type region. The semiconductor device structure includes a first P-type film between the light absorption structure and the P-type region. The semiconductor device structure includes a second P-type film between the light absorption structure and the N-type region, wherein a portion of the substrate separates the second P-type film from the N-type region.
    Type: Application
    Filed: January 4, 2024
    Publication date: July 10, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hao CHIANG, Li-Weng CHANG, Jiun-Yi WU, Chen-Hua YU
  • Publication number: 20250216589
    Abstract: A display panel including a first substrate, a pixel-array layer, and a color-resist layer is disclosed. The pixel-array layer includes multiple first signal lines, multiple second signal lines, and multiple third signal lines. Each of the first signal lines corresponds to a common border between multiple first color resists and multiple second color resists. Each of the second signal lines corresponds to a common border between multiple third color resists and multiple first color resists. Each of the third signal lines corresponds to a common border between multiple second color resists and multiple third color resists. Reflected light coming from the first signal lines, reflected light coming from the second signal lines, and reflected light coming from the third signal lines are mixed to form white light.
    Type: Application
    Filed: April 30, 2024
    Publication date: July 3, 2025
    Applicant: AUO Corporation
    Inventors: Chia-Chun Hsu, Chen-Hao Chiang, Yu-Ping Kuo, Hsiao-Wei Cheng
  • Publication number: 20250218792
    Abstract: The method includes receiving a semiconductor structure including a first surface, the first surface including a uniform material composition of ruthenium (Ru), selecting a first polishing slurry including a first abrasive component of titanium oxide and a first amine-based alkaline component of ammonium hydroxide, selecting a second polishing slurry including a second abrasive component of silicon oxide, a second amine-based alkaline component of hydroxyamine, and a non-amine alkaline component, polishing the first surface with the first polishing slurry until a second surface is exposed, the second surface including a conductive material and a dielectric material, and polishing the second surface with the second polishing slurry.
    Type: Application
    Filed: March 24, 2025
    Publication date: July 3, 2025
    Inventors: An-Hsuan Lee, Chen-Hao Wu, Chun-Hung Liao, Huang-Lin Chao, Shen-Nan Lee, Teng-Chun Tsai
  • Patent number: 12343172
    Abstract: An insertion device includes an upper casing, a lower casing and an insertion module. When the lower casing is coupled to the upper casing, an abutment portion of the lower casing limits movement of a casing engaging structure of the upper casing, such that the upper casing cannot move downwardly so as to prevent unintentional insertion operation of the insertion device.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 1, 2025
    Assignee: BIONIME CORPORATION
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Chen-Hao Lee, Kuan-Lin Chang
  • Patent number: 12328965
    Abstract: Various embodiments of the present disclosure are directed towards an optoelectronic device. The device includes a substrate, and a germanium photodiode region extending into an upper surface of the substrate. The germanium photodiode region has a curved upper surface that extends past the upper surface of the substrate. A silicon cap overlies the curved upper surface of the germanium photodiode region. There is an absence of oxide between the curved upper surface of the germanium photodiode region and an upper surface of the silicon cap.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: June 10, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hao Chiang, Eugene I-Chun Chen, Chih-Ming Chen
  • Patent number: 12327723
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device, including a substrate including a first semiconductor material and a semiconductor layer extending into an upper surface of the substrate and including a second semiconductor material with a different band gap than the first semiconductor material. The semiconductor device also includes a passive cap including a first dielectric material and disposed along the upper surface of the substrate and on opposite sides of the semiconductor layer, and a photodetector in the semiconductor layer. The first dielectric material includes silicon nitride.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: June 10, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lung Yuan Pan, Chen-Hao Chiang, Chih-Ming Chen
  • Patent number: 12321297
    Abstract: A bridge device for bridging a host device and a data storage device includes a first controller and a second controller. The first controller includes a first transmission interface. The second controller is coupled to the first controller and includes a second transmission interface. The second transmission interface is coupled to the first transmission interface through a bus. The first transmission interface operates in a slave mode and the second transmission interface operates in a master mode. The first transmission interface and the second transmission interface generate multiple transfer data chunks in compliance with a common bridge transfer format to perform transfer operations in dual directions for respectively transferring a command and data between a host device and a data storage device.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: June 3, 2025
    Assignee: Silicon Motion, Inc.
    Inventors: Chen-Hao Chen, Shih-Hsiang Shen, Hui-Lin Liu
  • Publication number: 20250170598
    Abstract: An atomization device includes a cooling chip, a discharge electrode, a heat sink, and a counter electrode. The discharge electrode includes a first side, a second side opposite to the first side, and a plurality of first tip portions located on the first side. The second side is connected to the cooling chip. The cooling chip is located between the heat sink and the discharge electrode. The counter electrode is spaced apart from the discharge electrode and includes multiple second tip portions. The second tip portions and the first tip portions are opposite to each other.
    Type: Application
    Filed: July 17, 2024
    Publication date: May 29, 2025
    Applicant: PEGATRON CORPORATION
    Inventors: Chen-Hao Liu, Tai-Jung Huang
  • Publication number: 20250168297
    Abstract: A video conference system and a video conference method are provided. The video conference system includes a master conference device and a slave conference device. The master conference device captures a master image that includes a speaker and crops out a master image of the speaker from the master panoramic image. The slave conference device captures a slave panoramic image that includes the speaker, and crops out a slave image of the speaker from the slave panoramic image. The master conference device compares the master image with the slave image to generate a comparison result, and transmits one of the master image and the slave image to a remote user device according to the comparison result.
    Type: Application
    Filed: October 21, 2024
    Publication date: May 22, 2025
    Inventors: CHEN-HAO WU, SHIN-CHUAN LEE
  • Publication number: 20250149426
    Abstract: A package structure includes a package substrate, an organic interposer and an electronic unit. The package substrate includes a plurality of first pads. The organic interposer is disposed on the package substrate and includes a plurality of second pads. The second pads are directly connected to the first pads to electrically connected the organic interposer to the package substrate. At least one of each of the first pads and each of the second pads includes a pad portion and a plurality of contact portions connecting the pad portion. A first extension direction of the pad portion is different from a second extension direction of the contact portions. The electronic unit is disposed on the organic interposer, wherein the electronic unit is electrically connected to the package substrate through the organic interposer.
    Type: Application
    Filed: September 24, 2024
    Publication date: May 8, 2025
    Applicant: Unimicron Technology Corp.
    Inventors: An-Sheng Lee, Chen-Hao Lin, Kai-Ming Yang, Pu-Ju Lin, Cheng-Ta Ko, Chin-Sheng Wang, Tzyy-Jang Tseng
  • Publication number: 20250141097
    Abstract: An antenna structure is capable of transceiving signals for a head-mounted wireless transmission display device including a display screen assembly. The antenna structure includes at least two body portions. Each of the body portions has at least a signal transceiving end. The body portions are respectively arranged at left and right sides of the display screen assembly. The signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen assembly respectively. A first distance between the two signal transceiving ends is greater than a width of the display screen assembly.
    Type: Application
    Filed: December 27, 2024
    Publication date: May 1, 2025
    Applicant: HTC CORPORATION
    Inventors: Sheng Cherng LIN, Hsiao-Ling CHAN, Chen-Hao CHANG, Chien-Chih CHEN
  • Publication number: 20250143011
    Abstract: A semiconductor device includes: a photodiode including a germanium material portion laterally extending along a first horizontal direction, a p-doped silicon portion, and an n-doped silicon portion; and a distributed Bragg reflector including multiple periodic repetitions of a unit layer stack including a first material layer and a second material layer, wherein interfaces between vertically-extending portions of material layers within the distributed Bragg reflector are perpendicular to the first horizontal direction, and wherein the distributed Bragg reflector is in contact with the germanium material portion.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 1, 2025
    Inventors: Chen-Hao Chiang, Li-Weng Chang, Jiun Yi Wu, Chen-Hua Yu