Patents by Inventor Chen Hao

Chen Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11914809
    Abstract: An illuminated trackpad includes a substrate, a light guide plate disposed under the substrate, a circuit board disposed under the light guide plate, and light-emitting elements disposed on the circuit board. The light guide plate includes light guide units and through holes. Each light guide unit is composed of light guide microstructures and substantially in the shape of a strip or a line. The through holes are respectively arranged on one side of the light guide units. The circuit board has a touch surface and a non-touch surface. The touch surface has a touch area on which sensing electrodes are disposed. The light-emitting elements are respectively accommodated in the through holes. After entering the light guide plate through inner walls of the through holes, the lights emitted by the light-emitting elements are guided upward through the light guide units to pass through the substrate and exit.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: February 27, 2024
    Assignee: Chicony Power Technology Co., Ltd.
    Inventor: Chen-Hao Chiu
  • Patent number: 11916083
    Abstract: A display substrate has an active area which includes a photosensitive region with a light-transmitting channel. The display substrate includes a base, a pixel circuit layer, a first insulating layer and a conductive light-shielding layer. The pixel circuit layer includes pixel circuits and at least one pixel circuit includes a first thin film transistor and a second thin film transistor. The first insulating layer has a first via hole. The conductive light-shielding layer includes a conductive light-shielding pattern that has a first light-transmitting hole. Orthogonal projections of the first light-transmitting hole and of a gap region between the first thin film transistor and the second thin film transistor have a first overlapping region, which the light-transmitting channel penetrates. The conductive light-shielding pattern is coupled with a source electrode or a drain electrode of the first thin film transistor through the first via hole.
    Type: Grant
    Filed: June 27, 2020
    Date of Patent: February 27, 2024
    Assignees: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jianbo Xian, Hongfei Cheng, Yongda Ma, Chen Xu, Xueguang Hao
  • Publication number: 20240061018
    Abstract: A voltage detection device is provided. The voltage detection device includes a first voltage divider circuit, a comparison circuit, and a second voltage divider circuit. The first voltage divider circuit is configured to receive an input voltage and output a comparison voltage according to the input voltage. The comparison circuit is configured to receive the comparison voltage to compare the comparison voltage with a reference voltage and determine whether to change a trigger signal according to a comparison result. The second voltage divider circuit is configured to receive the input voltage. When the input voltage is greater than or equal to a predetermined voltage value, the second voltage divider circuit and the first voltage dividing circuit form a parallel structure to pull down the comparison voltage.
    Type: Application
    Filed: October 20, 2022
    Publication date: February 22, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Wei-Gen Chung, Ming-Ting Tsai, Hsi-Ho Hsu, Chun-San Lin, Wei Kao, Chen-Hao Yu, Hsiang-Jui Hung
  • Patent number: 11896804
    Abstract: An insertion device includes an upper casing, an insertion module and a lower casing. The insertion module is disposed in the upper casing, and includes a main body assembly, an insertion seat, a first elastic member, a retraction seat and a second elastic member. When the upper casing is depressed, the insertion seat is driven by the first elastic member to perform an automatic-insertion operation, such that limiting structure between the insertion seat and the retraction seat collapses upon the collapse of another limiting structure between the insertion seat and the main body assembly, and that the retraction seat is driven by the second elastic member to perform an automatic-retraction operation.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: February 13, 2024
    Assignee: BIONIME CORPORATION
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Chen-Hao Lee, Kuan-Lin Chang
  • Patent number: 11892678
    Abstract: A photonic device includes a silicon layer, wherein the silicon layer extends from a waveguide region of the photonic device to a device region of the photonic device, and the silicon layer includes a waveguide portion in the waveguide region. The photonic device further includes a cladding layer over the waveguide portion, wherein the device region is free of the cladding layer. The photonic device further includes a low refractive index layer in direct contact with the cladding layer, wherein the low refractive index layer comprises silicon oxide, silicon carbide, silicon oxynitride, silicon carbon oxynitride, aluminum oxide or hafnium oxide. The photonic device further includes an interconnect structure over the low refractive index layer.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Ying Wu, Yuehying Lee, Sui-Ying Hsu, Chen-Hao Huang, Chien-Chang Lee, Chia-Ping Lai
  • Patent number: 11895780
    Abstract: A method of manufacturing package structures includes providing a carrier including a supporting layer, a metal layer, and a release layer between the supporting layer and the metal layer at first. Afterwards, a composite layer of a non-conductor inorganic material and an organic material is disposed on the metal layer. Then, a chip embedded substrate is bonded on the composite layer. Afterwards, an insulating protective layer having openings is formed on the circuit layer structure and exposes parts of the circuit layer structure in the openings. Afterwards, the supporting layer and the release layer are removed to form two package substrates. Then, each of the package substrates is cut.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chen-Hao Lin, Wang-Hsiang Tsai, Cheng-Ta Ko
  • Patent number: 11892681
    Abstract: A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. The chip includes a substrate. The chip further includes a grating on a first side of the substrate, wherein the grating is configured to receive the optical signal. The chip further includes an interconnect structure over the grating on the first side of the substrate, wherein the interconnect structure defines a cavity aligned with the grating. The chip further includes a first polysilicon layer on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chien-Chang Lee, Chia-Ping Lai
  • Publication number: 20240028164
    Abstract: A light-emitting touch panel includes a circuit board, a plurality of light-emitting elements, a shading plate and a cover plate. The light emitting element has a first height in a first direction. The shading plate has a plurality of spacing regions corresponding to the light emitting elements, respectively. A first width is provided between two partition walls of each spacing region in a second direction. Each partition wall has a second height in the first direction, and the second height is greater than the first height. The cover plate has a light-transmitting region, the light emitted by the light-emitting elements passes through the light-transmitting region, and a bright region is formed on the top surface of the cover plate away from the shading plate, wherein a second width of the bright region in the second direction is related to the second height and the first width.
    Type: Application
    Filed: April 27, 2023
    Publication date: January 25, 2024
    Inventor: Chen-Hao Chiu
  • Publication number: 20240028149
    Abstract: An illuminated trackpad includes a substrate, a light guide plate disposed under the substrate, a circuit board disposed under the light guide plate, and light-emitting elements disposed on the circuit board. The light guide plate includes light guide units and through holes. Each light guide unit is composed of light guide microstructures and substantially in the shape of a strip or a line. The through holes are respectively arranged on one side of the light guide units. The circuit board has a touch surface and a non-touch surface. The touch surface has a touch area on which sensing electrodes are disposed. The light-emitting elements are respectively accommodated in the through holes. After entering the light guide plate through inner walls of the through holes, the lights emitted by the light-emitting elements are guided upward through the light guide units to pass through the substrate and exit.
    Type: Application
    Filed: October 25, 2022
    Publication date: January 25, 2024
    Inventor: Chen-Hao CHIU
  • Publication number: 20240002653
    Abstract: A resin composition and a metal clad substrate are provided. The resin composition includes: 5 phr to 15 phr of a maleimide resin, 5 phr to 30 phr of a benzoxazine resin, 40 phr to 70 phr of an epoxy resin, and 40 phr to 60 phr of fillers. An amount of fluorine atoms contained in the maleimide resin ranges from 10 wt % to 50 wt %.
    Type: Application
    Filed: May 8, 2023
    Publication date: January 4, 2024
    Inventors: SHENG-YEN WU, SHOU-NENG TO, YA-PING LIU, CHEN-HAO CHANG, PEI-CHUN LAI
  • Publication number: 20230417977
    Abstract: A backlight module includes a glass substrate, a light-outputting sheet, a light guide plate, and a reflective sheet. The light-outputting sheet is disposed under the glass substrate and has a light-outputting region and a light-shielding region. The light-outputting region is disposed corresponding to the glass substrate. The light-shielding region is disposed corresponding to an outer periphery of the glass substrate. The light guide plate is disposed under the light-outputting sheet and has a light guide region and a light mixing region. The light guide region is disposed corresponding to the light-outputting region. The light mixing region is configured to receive light of a light-emitting element and guide the light to the light guide region. The light leaves the light guide region and then sequentially propagates through the light-outputting region and the glass substrate. The reflective sheet is disposed under the light guide plate.
    Type: Application
    Filed: November 8, 2022
    Publication date: December 28, 2023
    Inventors: Hsuan-Wei HO, Chun-Ming HUANG, Chen-Hao CHIU
  • Patent number: 11856694
    Abstract: The disclosure provides a circuit substrate and a method for manufacturing the same. The circuit substrate includes a wiring and a substrate having a base region and a circuit region. The base region having a first pattern is constituted by a first thermoplastic material. The circuit region having a second pattern is constituted by a second thermoplastic material. The first pattern has a portion opposite to the second pattern. The wiring is formed on the circuit region along the second pattern. The first thermoplastic material is different from the second thermoplastic material, and the second thermoplastic material includes a catalyst particle.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: December 26, 2023
    Assignee: National Taiwan University of Science and Technology
    Inventors: Chen-Hao Wang, Hsueh-Yu Chen, Guan-Cheng Tong
  • Publication number: 20230409131
    Abstract: An illuminated touch module includes a base sheet, a light-shielding sheet, a light guide plate, a light-emitting element, and a cover plate. The base sheet is disposed on a circuit board and has a light reflection area. The light-shielding sheet is disposed above the base sheet and has a side surface and a notch recessed from the side surface. An opening of the notch is aligned with an edge of the base sheet. The light guide plate is embedded in the notch and located above the light reflection area. The light guide plate has a light guide pattern formed by microstructures and has a light incident surface. The light-emitting element is disposed on the circuit board and has a light outputting surface facing the light incident surface and the light guide pattern. The cover plate covers above the light guide plate and the light-shielding sheet.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 21, 2023
    Inventor: Chen-Hao CHIU
  • Patent number: 11846796
    Abstract: A backlight module includes a glass substrate, a light-outputting sheet, a light guide plate, and a reflective sheet. The light-outputting sheet is disposed under the glass substrate and has a light-outputting region and a light-shielding region. The light-outputting region is disposed corresponding to the glass substrate. The light-shielding region is disposed corresponding to an outer periphery of the glass substrate. The light guide plate is disposed under the light-outputting sheet and has a light guide region and a light mixing region. The light guide region is disposed corresponding to the light-outputting region. The light mixing region is configured to receive light of a light-emitting element and guide the light to the light guide region. The light leaves the light guide region and then sequentially propagates through the light-outputting region and the glass substrate. The reflective sheet is disposed under the light guide plate.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: December 19, 2023
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Hsuan-Wei Ho, Chun-Ming Huang, Chen-Hao Chiu
  • Patent number: 11848390
    Abstract: At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, YuehYing Lee, Chien-Ying Wu, Chia-Ping Lai
  • Publication number: 20230384526
    Abstract: A method of making a chip includes depositing a first polysilicon layer on a top surface and a bottom surface of a substrate. The method further includes patterning the first polysilicon layer to define a recess, wherein the first polysilicon layer is completed removed from the recess. The method further includes implanting dopants into the substrate to define an implant region. The method further includes depositing a contact etch stop layer (CESL) in the recess, wherein the CESL covers the implant region. The method further includes patterning the CESL to define a CESL block. The method further includes forming a waveguide and a grating in the substrate. The method further includes forming an interconnect structure over the waveguide, the grating and the CESL block. The method further includes etching the interconnect structure to define a cavity aligned with the grating.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Chen-Hao HUANG, Hau-Yan LU, Sui-Ying HSU, Yuehying LEE, Chien-Ying WU, Chien-Chang LEE, Chia-Ping LAI
  • Publication number: 20230384528
    Abstract: A method of using a coupling system includes aligning an optical fiber with a cavity in a chip, wherein aligning the optical fiber comprises orienting the fiber within an angle ranging from about 88-degrees to about 92-degrees with respect to a top surface of the chip. The method further includes emitting an optical signal from the optical fiber. The method further includes redirecting the optical signal into a waveguide using a grating positioned on an opposite side of the cavity from the optical fiber.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Sui-Ying HSU, Yuehying LEE, Chien-Ying WU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
  • Publication number: 20230384527
    Abstract: A method of making a photonic device includes depositing a cladding layer over a silicon layer. The method further includes patterning the cladding layer to expose a first portion of the silicon layer, wherein a second portion of the silicon layer is covered by the patterned cladding layer, and a waveguide portion is in the second portion of the silicon layer. The method further includes depositing a low refractive index layer directly over the patterned cladding layer, wherein a refractive index of the low refractive index layer is less than a refractive index of silicon nitride.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Chien-Ying WU, Yuehying LEE, Sui-Ying HSU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
  • Patent number: 11830762
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure having an electrical contact. The method includes providing a semiconductor substrate; forming a dielectric structure over the semiconductor substrate, the dielectric structure having a trench; filling a polysilicon material in the trench of the dielectric structure; detecting the polysilicon material to determine a region of the polysilicon material having one or more defects formed therein; implanting the polysilicon material with a dopant material into the region; and annealing the polysilicon material to form a doped polysilicon contact.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: November 28, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chen-Hao Lien, Cheng-Yan Ji, Chu-Hsiang Hsu
  • Publication number: 20230369526
    Abstract: A stacked (or vertically arranged) photodetector having at least one contact region on a germanium sensing region. Including the at least one contact on the germanium sensing region reduces the amount of surface area of the germanium sensing region that is interfaced with a substrate (e.g., a silicon substrate) in which the germanium sensing region is included. This reduces the amount of lattice mismatch reduces the amount of misfit defects for the germanium sensing region, which reduces the dark current for the photodetector. The reduced amount of dark current may increase the photosensitivity of the photodetector, may increase low-light performance of the photodetector, and/or may decrease noise and other defects in images and/or light captured by the photodetector, among other examples.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventors: Chen-Hao CHIANG, Chih-Ming CHEN, Jing-Hwang YANG