Abstract: A bicycle component includes a composite laminate. The composite laminate includes a hollow container made of a first polymer-based material, a layer of a second polymer-based material disposed on the hollow container, and a layer of a composite material disposed on the layer of the second polymer-based material. The bicycle component also includes a water soluble core material disposed within hollow container.

Abstract: A planarization process is performed to a wafer. In various embodiments, the planarization process may include a chemical mechanical polishing (CMP) process. A byproduct generated by the planarization process is collected and analyzed. Based on the analysis, one or more process controls are performed for the planarization process. In some embodiments, the process controls include but are not limited to process endpoint detection or halting the planarization process based on detecting an error associated with the planarization process.

Abstract: Responsive to a request to access heterogeneous repositories, a REST server queries a resource registry to find resources that match mapping information contained in the request. The resource registry returns resource registry tables containing the matching resources. The resource registry tables implement a unified data structure of a resource registry model and are generated at runtime by the resource registry mapping REST service configuration parameters to the fields of the unified data structure. The REST service configuration parameters are added to an extension SDK for REST extension developers to enhance REST service configuration for extension applications. The REST service configuration parameters are configured at implementation time and loaded/scanned into the REST server at runtime. The REST server iteratively evaluates the resource registry tables until all the matching resources have been evaluated.

Abstract: An extension device, including a connecting base and an anti-theft lock assembly, is provided. The connecting base includes a housing, a first moving member, a fixed member, and a second moving member. The fixed member is disposed at one side of the housing and includes a lock hole. The second moving member is movably disposed between the first moving member and the fixed member. The anti-theft lock assembly is detachably disposed at one side of the fixed member opposite to the second moving member. The anti-theft lock assembly is adapted to pass through the lock hole of the fixed member and push against the second moving member, so that the second moving member abuts against the first moving member to stop the first moving member at a buckling position. In addition, an electronic system, including the extension device, is also provided.

Abstract: A pre-fabricated reinforcement cage structure and a method of hoisting and assembling the same are provided. The pre-fabricated reinforcement cage structure comprises: a pre-fabricated reinforcement cage, a plurality of couplers, and a first rebar-mounting frame. The first rebar-mounting frame comprises a first top, a first bottom plate and a first lateral plate. The first top has a plurality of notches formed along an edge of the first top plate, and each of the plurality of the notches is configured to receive a first end portion of the corresponding one of the plurality of rebars in the pre-fabricated reinforcement cage. A first end portion of each of the plurality of rebars abuts against a first top surface of the first bottom plate. Each of the first top plate and the bottom plate is connected to the first lateral plate.

Abstract: Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells including a first string of memory cells and a second string of memory cells; and a first switch including: a first electrode connected to first electrodes of the first string of memory cells and first electrodes of the second string of memory cells, and a second electrode connected to a first global bit line, wherein gate electrodes of the first string of memory cells are connected to a first word line and gate electrodes of the second string of memory cells are connected to a second word line.

Abstract: A method for implementing a real-time soft bus oriented to an intelligent rail transit system includes: defining a data type for interaction between a server and a communication front-end processor, where the defined data type is a message structure body which includes a message header and a message body; enabling professional subsystems to construct at least one publisher entity and/or at least one subscriber entity, respectively, where the data type of the communication between the publisher entity and the subscriber entity corresponding thereto is a message structure body. The subsystems choose to subscribe to the data of its interest, or to publish the data that it can provide.

Abstract: Provided herein are multi-antigenic human papilloma virus (HPV) molecular vaccine constructs for use and treatment of HPV associated disorders and pathologies; such as HPV molecular vaccines targeting HPV6 and HPV11 associated pathologies.

Abstract: The present disclosure, in some embodiments, relates to a memory device. In some embodiments, the memory device has a substrate and a lower interconnect metal line disposed over the substrate. The memory device also has a selector channel disposed over the lower interconnect metal line and a selector gate electrode wrapping around a sidewall of the selector channel and separating from the selector channel by a selector gate dielectric. The memory device also has a memory cell disposed over and electrically connected to the selector channel and an upper interconnect metal line disposed over the memory cell. By placing the selector within the back-end interconnect structure, front-end space is saved, and more integration flexibility is provided.

Abstract: A method includes forming a conductive feature through a first dielectric layer, sequentially forming a second dielectric layer and a third dielectric layer over the first dielectric layer, and etching the third dielectric layer to form an opening. A first width of the opening at a top surface of the third dielectric layer is greater than a second width of the opening at a first interface between the third dielectric layer and the second dielectric layer. The method also includes etching the second dielectric layer until the opening extends to the conductive feature, thereby forming an enlarged opening, and forming a metal material in the enlarged opening. A third width of the enlarged opening at the first interface is equal to or less than a fourth width of the enlarged opening at a second interface between the second dielectric layer and the first dielectric layer.

Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a first layer stack and a second layer stack successively over a substrate, where the first layer stack and the second layer stack have a same layered structure that includes a layer of a first electrically conductive material over a layer of a first dielectric material, where the first layer stack extends beyond lateral extents of the second layer stack; forming a trench that extends through the first layer stack and the second layer stack; lining sidewalls and a bottom of the trench with a ferroelectric material; conformally forming a channel material in the trench over the ferroelectric material; filling the trench with a second dielectric material; forming a first opening and a second opening in the second dielectric material; and filling the first opening and the second opening with a second electrically conductive material.

Abstract: An autonomous mobile device (AMD) may perform tasks within a physical space. The AMD may move over ramps, bumps, or navigate around obstacles. The AMD may have an inertial measurement unit (IMU) and distance sensors. The IMU provides tilt information indicative of the AMD being on a flat surface or a ramp. The distance sensors provide information on distances between the AMD and surrounding obstacles. Using IMU measurements, the AMD determines a first speed limit that is safe given the tilt of the AMD. Using the distance sensors, the AMD determines a second speed limit that is safe given a distance to an obstacle. The AMD determines a maximum speed based on the first and second speed limits. Based on the maximum speed, the AMD determines whether to adjust a current speed and by how much.

Abstract: In an embodiment, a device includes: a word line extending in a first direction; a data storage layer on a sidewall of the word line; a channel layer on a sidewall of the data storage layer; a back gate isolator on a sidewall of the channel layer; and a bit line having a first main region and a first extension region, the first main region contacting the channel layer, the first extension region separated from the channel layer by the back gate isolator, the bit line extending in a second direction, the second direction perpendicular to the first direction.

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a memory array is formed by manufacturing portions of a word line during different and separate processes, thereby allowing the portions formed first to act as a structural support during later processes that would otherwise cause undesired damage to the structures.

Abstract: Disclosed herein are device and method for performing a total internal reflection scattering (TIRS) measurement to a sample slide. The device comprises a first reflective plate having a first opening; a second reflective plate having second and third openings and disposed on top of the first reflective plate thereby forming a slot therebetween for accommodating the sample slide, wherein the first opening of the first reflective plate is disposed directly underneath the second opening of the second reflective plate; a white light source disposed in the space formed by the third opening of the second reflective plate and configured to emit a white light into the slot; and a first blackout layer disposed on top of the third opening thereby covering the white light source and keeping the emitted white light from leaking. When the sample slide is inserted into the slot, the white light source illuminates the sample slide so as to achieve the TIRS measurement to the sample slide.

Abstract: This document provides methods and materials for using low coverage whole genome sequencing techniques to assess genomes. For example, methods and materials for using targeted nucleic acid amplification and/or capture techniques in combination with low coverage whole genome sequencing techniques to obtain high coverage sequencing data for one or more pre-selected regions of a genome are provided.

Abstract: A memory array device includes a stack of transistors over a semiconductor substrate, a first transistor of the stack being disposed over a second transistor of the stack. The first transistor includes a first memory film along a first word line and a first channel region along a source line and a bit line, the first memory film being disposed between the first channel region and the first word line. The second transistor includes a second memory film along a second word line and a second channel region along the source line and the bit line, the second memory film being disposed between the second channel region and the second word line. The memory array device includes a first via electrically connected to the first word line and a second via electrically connected to the second word line, the second staircase via and the first staircase via having different widths.

Abstract: A method, system, and article is directed to automatic content-dependent image processing algorithm selection.

Abstract: A method includes collecting resource utilization statistics associated with execution of an application, identifying calls to a function associated with management of the application, and adjusting an allocation of computing resources for executing the application in view of the resource utilization statistics and the calls to the function.

Abstract: Embodiments relate to container resource autoscaling by a control plane. According to an aspect, a computer-implemented method includes receiving and intercepting a request from a software application by a proxy, the request for a service provided by a backend service of one or more control plane components. A processing device of the proxy determines, based on the intercepted request, an amount of resources to be assigned to or updated in the backend service. The processing device causes a control plane scaler coupled to the one or more control plane components to request the determined amount of resources for the backend service. Upon receiving a confirmation that the determined amount of resources is available in the backend service, the processing device forwards from the proxy, the intercepted request to the backend service.